Microchip’s dsPIC30F family of Digital Signal Controllers (DSCs) offer designers DSP like performance with the simplicity of an MCU. The dsPIC30F5011/5013 devices are general purpose DSCs that feature peripherals suitable for a variety of different applications.

30 MIPS Max. CPU Speed
Modified Harvard architecture
C compiler optimized instruction set architecture
83 base instructions with flexible addressing modes
24-bit wide instructions, 16-bit wide data path
66 Kbytes on-chip Flash program space
4 Kbytes of on-chip data RAM
1 Kbyte of non-volatile data EEPROM
16 x 16-bit working register array
Up to 41 interrupt sources

Modulo and Bit-Reversed modes
Two 40-bit wide accumulators with optional saturation logic
17-bit x 17-bit single-cycle hardware fractional/integer multiplier
All DSP instructions are single cycle - Multiply-Accumulate (MAC) operation
Single cycle ±16 shift Dual data fetch

High-current sink/source I/O pins: 25 mA/25 mA
Five 16-bit timers/counters – option to pair up 16-bit timers into 32-bit timer modules
One 16-bit Capture input functions
Two 16-bit Compare/PWM output functions
Data Converter Interface (DCI) supports common audio codec protocols, including I2S and AC’97
PWM generators with 8 outputs
12-Bit 200 ksps Analogue-to-Digital Converter (ADC) – 16 Channels
3-wire SPI modules
I2CTM module
Two UART Modules
Two CAN bus Modules