This STM32 Nucleo-144 board provides an affordable and flexible way for users to build prototypes with the STM32F722ZET6 microcontroller. The Zio connector, which is an extension of Arduino Uno, provides access to more peripherals and with the ST morpho headers expands the functionality with a choice of Shields. The integrated ST-LINK/V2-1 debugger/programmer comes with the STM32 comprehensive software HAL library, software examples, as well as direct access to the ARM mbed on-line resources. It is supported by wide range of Integrated Development Environments (IDEs) including IAR, Keil and GCC-based IDEs.

• STM32F722ZET6 216MHz Cortex-M7 core microcontroller with 512KB Flash memory, 256KB SRAM
• Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory
• Up to 21 serial communication interfaces: USART, IrDA, I²C, SPI, LIN, CAN, USB, I²S, SDIO
• True random number generator
• CRC calculation unit
• RTC with subsecond accuracy and hardware calendar
• 96-bit unique ID
• Flexible board power supply
• ST-LINK/V2-1 debugger/programmer with SWD connector
• USB OTG or FS Device with micro-AB connector
• Full access to all GPIO with ST Zio connector (Arduino Uno v3 connectivity support)
• ST morpho extension pin headers for access to all GPIO
• 3 x LEDs: Power LED, USB communication, User LED
• User and Reset pushbuttons
• 32.768 KHz crystal oscillator
• ARM mbed™- Enabled (See mbed.org)

The STM32F7 microcontrollers feature ST’s ART Accelerator™ as well as an L1 cache and deliver the maximum theoretical performance of the ARM Cortex-M7 core, regardless if code is executed from embedded Flash or external memory. Typical performance figures: 1082 CoreMark / 462 DMIPS at 216MHz clock frequency.

AXI and multi-AHB bus matrixes for interconnecting core, peripherals and memories
Double-Precision Floating-Point maths unit on some variants
Up to 16KB +16KB of I-cache and D-cache
Up to 2MB of embedded Flash memory, with Read-While-Write capability on certain devices
Up to 512KB of data memory, including up to 128KB of Tightly-Coupled Memory for Data (DTCM) for Stacks, Heaps
16KB of Tightly-Coupled Memory for Instructions (ITCM) for time-critical routines
4KB of backup SRAM to keep data in the lowest power modes
Peripheral speed is independent from CPU speed (dual clock support)
Protected code execution feature (PC-ROP) on some variants
Power Efficiency: 7 CoreMark/mW at +1.8Vdc