Renesas Electronics 9DB102BGILF, LVDS Buffer Dual TTL Buffer, 20-Pin TSSOP
- RS Stock No.:
- 217-7929
- Mfr. Part No.:
- 9DB102BGILF
- Brand:
- Renesas Electronics
Bulk discount available
Subtotal (1 pack of 5 units)*
£18.17
(exc. VAT)
£21.805
(inc. VAT)
FREE delivery for orders over £50.00
Temporarily out of stock
- 120 unit(s) shipping from 03 November 2025
Need more? Click ‘Check delivery dates’ to find extra stock and lead times.
Units | Per unit | Per Pack* |
|---|---|---|
| 5 - 5 | £3.634 | £18.17 |
| 10 - 20 | £3.278 | £16.39 |
| 25 - 95 | £3.086 | £15.43 |
| 100 - 245 | £2.686 | £13.43 |
| 250 + | £2.544 | £12.72 |
*price indicative
- RS Stock No.:
- 217-7929
- Mfr. Part No.:
- 9DB102BGILF
- Brand:
- Renesas Electronics
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Renesas Electronics | |
| Number of Drivers | 2 | |
| Input Type | TTL | |
| Output Type | Buffer | |
| Number of Elements per Chip | 2 | |
| Package Type | TSSOP | |
| Pin Count | 20 | |
Select all | ||
|---|---|---|
Brand Renesas Electronics | ||
Number of Drivers 2 | ||
Input Type TTL | ||
Output Type Buffer | ||
Number of Elements per Chip 2 | ||
Package Type TSSOP | ||
Pin Count 20 | ||
The Renesas Electronics 9DB102 zero-delay buffer supports PCI Express clocking requirements. The 9DB102 is driven by a differential SRC output pair from an IDT CK409/CK410-compliant main clock generator such as the 952601 or 954101. It attenuates jitter on the input clock and has a selectable PLL Band Width to maximize performance in systems with or without Spread- Spectrum clocking.
2 - 0.7 V HCSL differential output pairs
Phase jitter: PCIe Gen2 < 3.1 ps rms
Phase jitter: PCIe Gen1 < 86 ps peak to peak
Supports zero delay buffer mode and fanout mode
Bandwidth programming available
33-110 MHz operation in PLL mode
10-110 MHz operation in Bypass mode
Phase jitter: PCIe Gen2 < 3.1 ps rms
Phase jitter: PCIe Gen1 < 86 ps peak to peak
Supports zero delay buffer mode and fanout mode
Bandwidth programming available
33-110 MHz operation in PLL mode
10-110 MHz operation in Bypass mode
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