The 74HC4049D and 74HC4050D are high speed CMOS HEX BUFFERs fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The 74HC4049D is an inverting buffer, while the 74HC4050D is a non-inverting buffer. The internal circuits are composed of 3-stages (74HC4049D) or 2-stages (74HC4050D) of inverter, which provided high noise immunity and stable output. Input protection circuits are different from those of other high speed CMOS IC's. They eliminate the diodes on the VCC side thus providing of logic-level conversion from high-level voltages up to 15 V to low-level voltages. They are useful for battery back up circuits, because input voltage can be applied on IC's which are not biased by VCC

High speed: tpd = 8 ns (typ.) at VCC = 6.0 V
Low power dissipation: ICC = 1.0 μA (max) at Ta = 25 
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 V to 6.0 V