Nexperia 74HCT574D,652 Octal D Type Flip Flop IC, 3-State, 20-Pin SOIC
- RS Stock No.:
- 178-6962
- Mfr. Part No.:
- 74HCT574D,652
- Brand:
- Nexperia
Stock information currently inaccessible
- RS Stock No.:
- 178-6962
- Mfr. Part No.:
- 74HCT574D,652
- Brand:
- Nexperia
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Nexperia | |
| Logic Family | HCT | |
| Logic Function | D Type | |
| Input Type | Single Ended | |
| Output Type | 3 State | |
| Output Signal Type | Single Ended | |
| Triggering Type | Positive Edge | |
| Polarity | Non-Inverting | |
| Mounting Type | Surface Mount | |
| Package Type | SOIC | |
| Pin Count | 20 | |
| Number of Elements per Chip | 8 | |
| Maximum Propagation Delay Time @ Maximum CL | 33 ns @ 4.5 V | |
| Dimensions | 13 x 7.6 x 2.45mm | |
| Maximum Operating Supply Voltage | 5.5 V | |
| Propagation Delay Test Condition | 50pF | |
| Maximum Operating Temperature | +125 °C | |
| Length | 13mm | |
| Minimum Operating Supply Voltage | 4.5 V | |
| Width | 7.6mm | |
| Height | 2.45mm | |
| Minimum Operating Temperature | -40 °C | |
| Select all | ||
|---|---|---|
Brand Nexperia | ||
Logic Family HCT | ||
Logic Function D Type | ||
Input Type Single Ended | ||
Output Type 3 State | ||
Output Signal Type Single Ended | ||
Triggering Type Positive Edge | ||
Polarity Non-Inverting | ||
Mounting Type Surface Mount | ||
Package Type SOIC | ||
Pin Count 20 | ||
Number of Elements per Chip 8 | ||
Maximum Propagation Delay Time @ Maximum CL 33 ns @ 4.5 V | ||
Dimensions 13 x 7.6 x 2.45mm | ||
Maximum Operating Supply Voltage 5.5 V | ||
Propagation Delay Test Condition 50pF | ||
Maximum Operating Temperature +125 °C | ||
Length 13mm | ||
Minimum Operating Supply Voltage 4.5 V | ||
Width 7.6mm | ||
Height 2.45mm | ||
Minimum Operating Temperature -40 °C | ||
The 74HC574, 74HCT574 is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Mixed 5 V and 3.3 V applications
Improved signal integrity with integrated termination resistors
High noise immunity
Flow through pin out for easy layout
Wide supply voltage range
Low propagation delay
Overvoltage tolerant input options
Integrated source termination resistor options
Bus hold options
Key applications
Frequency division
Controlled delays
Interface between asynchronous and synchronous systems