Infineon NOR 256Mbit SPI Flash Memory 24-Pin BGA, S25FL256SAGBHV200
- RS Stock No.:
- 193-8746
- Mfr. Part No.:
- S25FL256SAGBHV200
- Brand:
- Infineon
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- RS Stock No.:
- 193-8746
- Mfr. Part No.:
- S25FL256SAGBHV200
- Brand:
- Infineon
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
---|---|---|
Brand | Infineon | |
Memory Size | 256Mbit | |
Interface Type | SPI | |
Package Type | BGA | |
Pin Count | 24 | |
Organisation | 32M x 8 bit | |
Mounting Type | Surface Mount | |
Cell Type | NOR | |
Minimum Operating Supply Voltage | 2.7 V | |
Maximum Operating Supply Voltage | 3.6 V | |
Block Organisation | Symmetrical | |
Length | 8mm | |
Height | 1mm | |
Width | 6mm | |
Dimensions | 8 x 6 x 1mm | |
Series | S25FL | |
Number of Words | 32M | |
Minimum Operating Temperature | -40 °C | |
Maximum Random Access Time | 14.5ns | |
Automotive Standard | AEC-Q100 | |
Maximum Operating Temperature | +105 °C | |
Number of Bits per Word | 8bit | |
Select all | ||
---|---|---|
Brand Infineon | ||
Memory Size 256Mbit | ||
Interface Type SPI | ||
Package Type BGA | ||
Pin Count 24 | ||
Organisation 32M x 8 bit | ||
Mounting Type Surface Mount | ||
Cell Type NOR | ||
Minimum Operating Supply Voltage 2.7 V | ||
Maximum Operating Supply Voltage 3.6 V | ||
Block Organisation Symmetrical | ||
Length 8mm | ||
Height 1mm | ||
Width 6mm | ||
Dimensions 8 x 6 x 1mm | ||
Series S25FL | ||
Number of Words 32M | ||
Minimum Operating Temperature -40 °C | ||
Maximum Random Access Time 14.5ns | ||
Automotive Standard AEC-Q100 | ||
Maximum Operating Temperature +105 °C | ||
Number of Bits per Word 8bit | ||
This family of devices connect to a host system via a SPI. Traditional SPI single bit serial input and output (Single I/O or SIO) is supported as well as optional two bit (Dual I/O or DIO) and four bit (Quad I/O or QIO) serial commands. This multiple width interface is called SPI Multi-I/O or MIO. In addition, the FL-S family adds support for DDR read commands for SIO, DIO and QIO that transfer address and read data on both edges of the clock.The Eclipse architecture features a Page Programming Buffer that allows up to 128 words (256 bytes) or 256 words (512 bytes) to be programmed in one operation, resulting in faster effective programming and erase than prior generation SPI program or erase algorithms. Executing code directly from flash memory is often called Execute-In-Place or XIP. By using FL-S devices at the higher clock rates supported, with QIO or DDR-QIO commands, the instruction read transfer rate can match or exceed traditional parallel interface, asynchronous, NOR flash memories while reducing signal count dramatically.The S25FL128S and S25FL256S products offer high densities coupled with the flexibility and fast performance required by a variety of embedded applications. They are ideal for code shadowing, XIP and data storage.
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