Microchip LAN8650B1-E/LMX, Ethernet Controller, 10Mbps SPI, SPI, 3.3 V, 32-Pin VQFN
- RS Stock No.:
- 352-161
- Mfr. Part No.:
- LAN8650B1-E/LMX
- Brand:
- Microchip
Bulk discount available
Subtotal (1 unit)*
£4.03
(exc. VAT)
£4.84
(inc. VAT)
FREE delivery for orders over £50.00
In Stock
- 490 unit(s) ready to ship
Need more? Click ‘Check delivery dates’ to find extra stock and lead times.
Units | Per unit |
---|---|
1 - 9 | £4.03 |
10 + | £3.63 |
*price indicative
- RS Stock No.:
- 352-161
- Mfr. Part No.:
- LAN8650B1-E/LMX
- Brand:
- Microchip
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
---|---|---|
Brand | Microchip | |
Physical Network Type | 10BaseT | |
Host Interface | SPI | |
Network Interface | SPI | |
IC Type | Interface IC | |
Communication Mode | Half Duplex | |
Data Rate | 10Mbps | |
Package Type | VQFN | |
Pin Count | 32 | |
Typical Operating Supply Voltage | 3.3 V | |
Select all | ||
---|---|---|
Brand Microchip | ||
Physical Network Type 10BaseT | ||
Host Interface SPI | ||
Network Interface SPI | ||
IC Type Interface IC | ||
Communication Mode Half Duplex | ||
Data Rate 10Mbps | ||
Package Type VQFN | ||
Pin Count 32 | ||
Typical Operating Supply Voltage 3.3 V | ||
- COO (Country of Origin):
- TH
The Microchip MAC-PHY Ethernet Controller with SPI combines a Media Access Controller (MAC) and an Ethernet PHY to enable low‑cost microcontrollers, including those without an onboard MAC, to access 10BASE‑T1S networks. The common standard Serial Peripheral Interface (SPI) of the LAN8650 allows interfacing with nearly any microcontroller, so that the transfer of Ethernet packets and LAN8650 control/status commands are performed over a single, serial interface. SPI also requires only 4 pins, enabling a simpler hardware interface with fewer pins than MII or RMII.
Internal wall clock
Event generation and event capture synchronized to the wall clock
Phase adjuster for the wall clock to minimize microcontroller overhead
Packet timestamping
Event generation and event capture synchronized to the wall clock
Phase adjuster for the wall clock to minimize microcontroller overhead
Packet timestamping
Related links
- Microchip LAN8651B1-E/LMX 10Mbps SPI 3.3 V, 32-Pin VQFN
- Microchip LAN8650B0-E/LMX 10Mbit/s SPI 2.5 V, 32-Pin 32-VQFN
- Microchip LAN8651B0-E/LMX 10Mbit/s SPI 2.5 V, 32-Pin 32-VQFN
- Microchip LAN8670C2-E/LMX 10Mbps MII 3.3 V, 32-Pin VQFN
- Microchip ENC28J60T-I/SS 10Mbps SPI 3.3 V, 28-Pin SSOP
- Microchip ENC28J60-I/SO 10Mbps SPI 3.3 V, 28-Pin SOIC
- Microchip LAN8670C2T-E/LMX 100Mbps 10BASE T1S 1.2 V, 32-Pin VQFN
- Microchip LAN8650B1T-E/LMX 100Mbps 1.2 V, 24-Pin VQFN