Renesas Electronics 85102AGILF Clock Buffer, 16-Pin 7 TSSOP

RS Stock No.:: 216-6207
Mfr. Part No.:: 85102AGILF
Brand:: Renesas Electronics

Renesas Electronics 85102AGILF Clock Buffer, 16-Pin 7 TSSOP

Subtotal (1 tube of 96 units)*

£856.80

(exc. VAT)

£1,028.16

(inc. VAT)

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Units	Per unit	Per Tube*
96 +	£8.925	£856.80

*price indicative

RS Stock No.:: 216-6207
Mfr. Part No.:: 85102AGILF
Brand:: Renesas Electronics

Specifications

Technical Reference

Legislation and Compliance

Product Details

Find similar products by selecting one or more attributes.

Select all	Attribute	Value
	Brand	Renesas Electronics
	Product Type	Clock Buffer
	Mount Type	Surface
	Package Type	TSSOP
	Pin Count	16
	Minimum Supply Voltage	3V
	Maximum Supply Voltage	3.3V
	Minimum Operating Temperature	-40°C
	Maximum Operating Temperature	85°C
	Series	85102A
	Standards/Approvals	No
	Height	1mm
	Length	5mm
	Automotive Standard	No
	Maximum Output Frequency	200MHz

	Select all
	Brand Renesas Electronics
	Product Type Clock Buffer
	Mount Type Surface
	Package Type TSSOP
	Pin Count 16
	Minimum Supply Voltage 3V
	Maximum Supply Voltage 3.3V
	Minimum Operating Temperature -40°C
	Maximum Operating Temperature 85°C
	Series 85102A
	Standards/Approvals No
	Height 1mm
	Length 5mm
	Automotive Standard No
	Maximum Output Frequency 200MHz

Datasheet - 85102AGILF

The Renesas Electronics 85102I is a low skew, high performance 1-to-2 Differential-to-HCSL fanout buffer. The 85102I has a differential clock input. The CLK0, nCLK0 input pair can accept most standard differential input levels. The clock enable is internally synchronized to eliminate runt clock pulses on the output during asynchronous assertion/ deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 85102I ideal for those applications demanding well defi ned performance and repeatability.

Two 0.7V differential HCSL outputs

Selectable differential CLK0, nCLK0 or LVCMOS inputs

CLK0, nCLK0 pair can accept the following differential

input levels: LVPECL, LVDS, LVHSTL, HCSL

CLK1 can accept the following input levels:

LVCMOS or LVTTL

Maximum output frequency: 500MHz

Translates any single-ended input signal to 3.3V

HCSL levels with resistor bias on nCLK input

Output skew: 65ps (maximum)

Part-to-part skew: 600ps (maximum)

Propagation delay: 3.2ns (maximum)

Renesas Electronics 85102AGILF Clock Buffer, 16-Pin 7 TSSOP

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