8305AGLF, Clock Buffer, 5-Input, 16-Pin TSSOP
- RS Stock No.:
- 216-6205
- Mfr. Part No.:
- 8305AGLF
- Brand:
- Renesas Electronics
158 In stock - FREE next working day delivery available
Price Each (In a Tube of 96)
£5.165
(exc. VAT)
£6.198
(inc. VAT)
Units | Per unit | Per Tube* |
---|---|---|
96 + | £5.165 | £495.84 |
*price indicative
- RS Stock No.:
- 216-6205
- Mfr. Part No.:
- 8305AGLF
- Brand:
- Renesas Electronics
Technical Reference
Legislation and Compliance
Product Details
The Renesas Electronics ICS8305 is a low skew, 1-to-4, Differential/ LVCMOS-to-LVCMOS/LVTTL Fanout Buffer. The ICS8305 has selectable clock inputs that accept either differential or single ended input levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Outputs are forced LOW when the clock is disabled. A separate output enable pin controls whether the outputs are in the active or high impedance state.
Four LVCMOS / LVTTL outputs, 7 output impedance
Selectable differential or LVCMOS / LVTTL clock inputs
CLK, nCLK pair can accept the following differential input levels:
LVPECL, LVDS, LVHSTL, HCSL, SSTL
LVCMOS_CLK supports the following input types: LVCMOS,
LVTTL
Maximum output frequency: 350MHz
Output skew: 35ps (maximum)
Part-to-part skew: 700ps (maximum)
Additive phase jitter, RMS: 0.04ps (typical)
Selectable differential or LVCMOS / LVTTL clock inputs
CLK, nCLK pair can accept the following differential input levels:
LVPECL, LVDS, LVHSTL, HCSL, SSTL
LVCMOS_CLK supports the following input types: LVCMOS,
LVTTL
Maximum output frequency: 350MHz
Output skew: 35ps (maximum)
Part-to-part skew: 700ps (maximum)
Additive phase jitter, RMS: 0.04ps (typical)
Specifications
Attribute | Value |
---|---|
Logic Function | Clock Buffer |
Number of Clock Inputs | 5 |
Package Type | TSSOP |
Pin Count | 16 |
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