Microchip SY100ELT22LZG, Logic Level Translator Translator, 8-Pin SOIC
- RS Stock No.:
- 177-9831
- Mfr. Part No.:
- SY100ELT22LZG
- Brand:
- Microchip
Stock information currently inaccessible
- RS Stock No.:
- 177-9831
- Mfr. Part No.:
- SY100ELT22LZG
- Brand:
- Microchip
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Microchip | |
| Logic Family | PECL | |
| Mounting Type | Surface Mount | |
| Package Type | SOIC | |
| Pin Count | 8 | |
| Dimensions | 4.93 x 3.94 x 1.48mm | |
| Logic Function | Translator | |
| Maximum High Level Output Current | 100 (Surge) mA, 50 (Continuous) mA | |
| Maximum Propagation Delay Time @ Maximum CL | 600ps | |
| Maximum Operating Supply Voltage | 5.5 V | |
| Maximum Operating Temperature | +85 °C | |
| Minimum Operating Supply Voltage | 4.2 V | |
| Minimum Operating Temperature | -40 °C | |
| Select all | ||
|---|---|---|
Brand Microchip | ||
Logic Family PECL | ||
Mounting Type Surface Mount | ||
Package Type SOIC | ||
Pin Count 8 | ||
Dimensions 4.93 x 3.94 x 1.48mm | ||
Logic Function Translator | ||
Maximum High Level Output Current 100 (Surge) mA, 50 (Continuous) mA | ||
Maximum Propagation Delay Time @ Maximum CL 600ps | ||
Maximum Operating Supply Voltage 5.5 V | ||
Maximum Operating Temperature +85 °C | ||
Minimum Operating Supply Voltage 4.2 V | ||
Minimum Operating Temperature -40 °C | ||
- COO (Country of Origin):
- US
The SY10/100ELT22 are dual TTL-to-differential PECL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and the low skew, dual gate design of the ELT22 makes it ideal for applications which require the tranlation of a clock and a data signal. The ELT22 is available in both ECL standards: the 10ELT is compatible with positive ECL 10H logic levels, while the 100ELT is compatible with positive ECL 100K logic levels.
300ps typical propagation delay
<100ps output-to-output skew
Differential PECL outputs
PNP TTL inputs for minimal loading
Flow-through pinouts
Available in 8-pin SOIC package
<100ps output-to-output skew
Differential PECL outputs
PNP TTL inputs for minimal loading
Flow-through pinouts
Available in 8-pin SOIC package