Alliance Memory SRAM, AS7C34098A-10TIN- 4Mbit
- RS Stock No.:
- 230-8469P
- Mfr. Part No.:
- AS7C34098A-10TIN
- Brand:
- Alliance Memory
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Subtotal 10 units (supplied in a tray)*
£41.90
(exc. VAT)
£50.30
(inc. VAT)
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In Stock
- 110 unit(s) ready to ship
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Units | Per unit |
---|---|
10 - 18 | £4.19 |
20 - 48 | £4.11 |
50 - 98 | £4.08 |
100 + | £3.675 |
*price indicative
- RS Stock No.:
- 230-8469P
- Mfr. Part No.:
- AS7C34098A-10TIN
- Brand:
- Alliance Memory
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
---|---|---|
Brand | Alliance Memory | |
Memory Size | 4Mbit | |
Organisation | 256K x 16 | |
Number of Words | 262144 | |
Number of Bits per Word | 16bit | |
Maximum Random Access Time | 55ns | |
Low Power | Yes | |
Timing Type | Asynchronous | |
Mounting Type | Surface Mount | |
Package Type | TSOP-44 | |
Pin Count | 44 | |
Dimensions | 18.52 x 10.26 x 1.05mm | |
Height | 1.05mm | |
Maximum Operating Supply Voltage | 3.6 V | |
Width | 10.3mm | |
Minimum Operating Supply Voltage | 3 V | |
Maximum Operating Temperature | +85 °C | |
Minimum Operating Temperature | -40 °C | |
Length | 18.6mm | |
Select all | ||
---|---|---|
Brand Alliance Memory | ||
Memory Size 4Mbit | ||
Organisation 256K x 16 | ||
Number of Words 262144 | ||
Number of Bits per Word 16bit | ||
Maximum Random Access Time 55ns | ||
Low Power Yes | ||
Timing Type Asynchronous | ||
Mounting Type Surface Mount | ||
Package Type TSOP-44 | ||
Pin Count 44 | ||
Dimensions 18.52 x 10.26 x 1.05mm | ||
Height 1.05mm | ||
Maximum Operating Supply Voltage 3.6 V | ||
Width 10.3mm | ||
Minimum Operating Supply Voltage 3 V | ||
Maximum Operating Temperature +85 °C | ||
Minimum Operating Temperature -40 °C | ||
Length 18.6mm | ||
The Alliance Memory AS7C34098A is a high-performance CMOS 4,194,304-bit Static Random Access Memory (SRAM) device organized as 262,144 words x 16 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired. Equal address access and cycle times (tAA, tRC, tWC) of 10/12/15/20 ns with output enable access times (tOE) of 4/5/6/7 ns are ideal for high-performance applications. The chip enable input CE permits easy memory expansion with multiple-bank memory systems.
Easy memory expansion with CE, OE inputs
TTL- and CMOS-compatible, three-state I/O
TTL- and CMOS-compatible, three-state I/O