Infineon SRAM, CY14B101PA-SFXI- 1 MB
- RS Stock No.:
- 181-8377
- Mfr. Part No.:
- CY14B101PA-SFXI
- Brand:
- Infineon
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Units | Per unit |
|---|---|
| 1 + | £8.80 |
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- RS Stock No.:
- 181-8377
- Mfr. Part No.:
- CY14B101PA-SFXI
- Brand:
- Infineon
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Infineon | |
| Memory Size | 1MB | |
| Product Type | SRAM | |
| Organisation | 128K x 8 bit | |
| Number of Words | 128k | |
| Number of Bits per Word | 8 | |
| Maximum Random Access Time | 15ns | |
| Address Bus Width | 8bit | |
| Maximum Clock Frequency | 104MHz | |
| Minimum Supply Voltage | 2.4V | |
| Timing Type | Synchronous | |
| Maximum Supply Voltage | 2.6V | |
| Mount Type | Surface | |
| Package Type | SOIC | |
| Minimum Operating Temperature | -40°C | |
| Pin Count | 16 | |
| Maximum Operating Temperature | 85°C | |
| Length | 10.49mm | |
| Height | 2.36mm | |
| Width | 7.59 mm | |
| Standards/Approvals | No | |
| Series | CY14B101PA | |
| Automotive Standard | No | |
| Select all | ||
|---|---|---|
Brand Infineon | ||
Memory Size 1MB | ||
Product Type SRAM | ||
Organisation 128K x 8 bit | ||
Number of Words 128k | ||
Number of Bits per Word 8 | ||
Maximum Random Access Time 15ns | ||
Address Bus Width 8bit | ||
Maximum Clock Frequency 104MHz | ||
Minimum Supply Voltage 2.4V | ||
Timing Type Synchronous | ||
Maximum Supply Voltage 2.6V | ||
Mount Type Surface | ||
Package Type SOIC | ||
Minimum Operating Temperature -40°C | ||
Pin Count 16 | ||
Maximum Operating Temperature 85°C | ||
Length 10.49mm | ||
Height 2.36mm | ||
Width 7.59 mm | ||
Standards/Approvals No | ||
Series CY14B101PA | ||
Automotive Standard No | ||
The Cypress CY14X101PA combines a 1-Mbit nv SRAM[1] with a full-featured RTC in a monolithic integrated circuit with serial SPI interface. The memory is organized as 128K words of 8 bits each. The embedded nonvolatile elements incorporate the Quantum Trap technology, creating the worlds most reliable nonvolatile memory. The SRAM provides infinite read and write cycles, while the Quantum Trap cells provide highly reliable nonvolatile storage of data. Data transfers from SRAM to the nonvolatile elements (STORE operation) takes place automatically at power-down. On power-up, data is restored to the SRAM from the nonvolatile memory (RECALL operation).You can also initiate the STORE and RECALL operations through SPI instruction.
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