Infineon S27KS0643GABHV020, DDR SDRAM Memory 64Mbit Surface Mount, 200MHz, 1.7 V to 2 V, 24-Pin FBGA
- RS Stock No.:
- 201-7969
- Mfr. Part No.:
- S27KS0643GABHV020
- Brand:
- Infineon
Subtotal (1 tray of 338 units)*
£828.10
(exc. VAT)
£993.72
(inc. VAT)
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- Shipping from 02 November 2026
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Tray(s) | Per Tray | Per unit* |
|---|---|---|
| 1 + | £828.10 | £2.45 |
*price indicative
- RS Stock No.:
- 201-7969
- Mfr. Part No.:
- S27KS0643GABHV020
- Brand:
- Infineon
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Infineon | |
| Memory Size | 64Mbit | |
| Organisation | 8M x 8 | |
| SDRAM Class | DDR | |
| Data Rate | 200MHz | |
| Data Bus Width | 8bit | |
| Address Bus Width | 16bit | |
| Number of Bits per Word | 8bit | |
| Maximum Random Access Time | 35ns | |
| Number of Words | 8M | |
| Mounting Type | Surface Mount | |
| Package Type | FBGA | |
| Pin Count | 24 | |
| Dimensions | 8 x 6 x 1mm | |
| Height | 1mm | |
| Length | 8mm | |
| Maximum Operating Supply Voltage | 2 V | |
| Maximum Operating Temperature | +105 °C | |
| Minimum Operating Supply Voltage | 1.7 V | |
| Minimum Operating Temperature | -40 °C | |
| Width | 6mm | |
Select all | ||
|---|---|---|
Brand Infineon | ||
Memory Size 64Mbit | ||
Organisation 8M x 8 | ||
SDRAM Class DDR | ||
Data Rate 200MHz | ||
Data Bus Width 8bit | ||
Address Bus Width 16bit | ||
Number of Bits per Word 8bit | ||
Maximum Random Access Time 35ns | ||
Number of Words 8M | ||
Mounting Type Surface Mount | ||
Package Type FBGA | ||
Pin Count 24 | ||
Dimensions 8 x 6 x 1mm | ||
Height 1mm | ||
Length 8mm | ||
Maximum Operating Supply Voltage 2 V | ||
Maximum Operating Temperature +105 °C | ||
Minimum Operating Supply Voltage 1.7 V | ||
Minimum Operating Temperature -40 °C | ||
Width 6mm | ||
The Cypress Semiconductor S27KL0642/S27KS0642 is a 64 Mb HyperRAM which is a high-speed CMOS, self-refresh DRAM, with Hyper Bus interface. The array of the DRAM uses dynamic cells that require periodic refresh. The refresh control logic which is within the device, manages the refresh operations on the DRAM array when the memory is not being actively read or written by the Hyper Bus interface master (host). The DRAM array appears to the host as though the memory uses static cells that retain data without refresh, as the host is not required to manage any refresh operations. Hence, this memory is more accurately called or can be described as Pseudo Static RAM (PSRAM).
Temperature Range: -40°C to +85°C
Interface Bandwidth (MBps): 400MBps
RoHS Compliant
Interface Bandwidth (MBps): 400MBps
RoHS Compliant
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