Infineon S27KS0643GABHV020 DDR SDRAM Memory 64 MB Surface, 24-Pin 8 bit FBGA
- RS Stock No.:
- 201-7969
- Mfr. Part No.:
- S27KS0643GABHV020
- Brand:
- Infineon
Subtotal (1 tray of 338 units)*
£797.68
(exc. VAT)
£957.22
(inc. VAT)
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- Shipping from 12 June 2026
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Tray(s) | Per Tray | Per unit* |
|---|---|---|
| 1 + | £797.68 | £2.36 |
*price indicative
- RS Stock No.:
- 201-7969
- Mfr. Part No.:
- S27KS0643GABHV020
- Brand:
- Infineon
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Infineon | |
| Memory Size | 64MB | |
| Product Type | DDR SDRAM Memory | |
| Organisation | 8M x 8 Bit | |
| Data Bus Width | 8bit | |
| Address Bus Width | 16bit | |
| Maximum Clock Frequency | 200MHz | |
| Number of Bits per Word | 8 | |
| Maximum Random Access Time | 35ns | |
| Number of Words | 8K | |
| Mount Type | Surface | |
| Package Type | FBGA | |
| Minimum Operating Temperature | -40°C | |
| Pin Count | 24 | |
| Maximum Operating Temperature | 105°C | |
| Height | 1mm | |
| Width | 8 mm | |
| Series | S27KS0643 | |
| Standards/Approvals | No | |
| Length | 8mm | |
| Minimum Supply Voltage | 1.7V | |
| Maximum Supply Voltage | 2V | |
| Automotive Standard | No | |
| Select all | ||
|---|---|---|
Brand Infineon | ||
Memory Size 64MB | ||
Product Type DDR SDRAM Memory | ||
Organisation 8M x 8 Bit | ||
Data Bus Width 8bit | ||
Address Bus Width 16bit | ||
Maximum Clock Frequency 200MHz | ||
Number of Bits per Word 8 | ||
Maximum Random Access Time 35ns | ||
Number of Words 8K | ||
Mount Type Surface | ||
Package Type FBGA | ||
Minimum Operating Temperature -40°C | ||
Pin Count 24 | ||
Maximum Operating Temperature 105°C | ||
Height 1mm | ||
Width 8 mm | ||
Series S27KS0643 | ||
Standards/Approvals No | ||
Length 8mm | ||
Minimum Supply Voltage 1.7V | ||
Maximum Supply Voltage 2V | ||
Automotive Standard No | ||
The Cypress Semiconductor S27KL0642/S27KS0642 is a 64 Mb HyperRAM which is a high-speed CMOS, self-refresh DRAM, with Hyper Bus interface. The array of the DRAM uses dynamic cells that require periodic refresh. The refresh control logic which is within the device, manages the refresh operations on the DRAM array when the memory is not being actively read or written by the Hyper Bus interface master (host). The DRAM array appears to the host as though the memory uses static cells that retain data without refresh, as the host is not required to manage any refresh operations. Hence, this memory is more accurately called or can be described as Pseudo Static RAM (PSRAM).
Temperature Range: -40°C to +85°C
Interface Bandwidth (MBps): 400MBps
RoHS Compliant
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