Microchip DSPIC33CH128MP502-I/2N, Microprocessor dsPIC33CH 16bit DSP, MCU 180 MHz, 200 MHz 28-Pin UQFN
- RS Stock No.:
- 175-7200
- Mfr. Part No.:
- DSPIC33CH128MP502-I/2N
- Brand:
- Microchip
Currently unavailable
We don’t know if this item will be back in stock, it is being discontinued by the manufacturer.
- RS Stock No.:
- 175-7200
- Mfr. Part No.:
- DSPIC33CH128MP502-I/2N
- Brand:
- Microchip
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
---|---|---|
Brand | Microchip | |
Family Name | dsPIC33CH | |
Data Bus Width | 16bit | |
Instruction Set Architecture | DSP, MCU | |
Maximum Frequency | 180 MHz, 200 MHz | |
Fabrication Technology | CMOS | |
Mounting Type | Surface Mount | |
Package Type | UQFN | |
Pin Count | 28 | |
Typical Operating Supply Voltage | 3 → 3.6 V | |
Dimensions | 6 x 6 x 0.42mm | |
Maximum Operating Temperature | +85 °C | |
Minimum Operating Temperature | -40 °C | |
Select all | ||
---|---|---|
Brand Microchip | ||
Family Name dsPIC33CH | ||
Data Bus Width 16bit | ||
Instruction Set Architecture DSP, MCU | ||
Maximum Frequency 180 MHz, 200 MHz | ||
Fabrication Technology CMOS | ||
Mounting Type Surface Mount | ||
Package Type UQFN | ||
Pin Count 28 | ||
Typical Operating Supply Voltage 3 → 3.6 V | ||
Dimensions 6 x 6 x 0.42mm | ||
Maximum Operating Temperature +85 °C | ||
Minimum Operating Temperature -40 °C | ||
- COO (Country of Origin):
- US
System developers designing high-end embedded control applications can benefit from a new Digital Signal Controller (DSC) with two dsPIC DSC cores in a single chip. The dsPIC33CH has one core that is designed to function as a master while the other is designed as a slave. The slave core is useful for executing dedicated, time-critical control code while the master core is busy running the user interface, system monitoring and communications functions, customized for the end application.
Operating Conditions
3V to 3.6V, -40°C to +125°C
Core: Dual 16-Bit dsPIC33CH CPUs
Master Core 90 MIPS and Slave Core 100 MIPS Operation
Independent Peripherals for Master Core and Slave Core
Configurable Shared Resources for Master Core and Slave Core
Programmable PLLs and Oscillator Clock Sources
Fast Wake-up and Start-up
Backup Internal Oscillator
Low-Power Management Modes (Sleep, Idle, Doze)
Integrated Power-on Reset and Brown-out Reset
Debugger Development Support
3V to 3.6V, -40°C to +125°C
Core: Dual 16-Bit dsPIC33CH CPUs
Master Core 90 MIPS and Slave Core 100 MIPS Operation
Independent Peripherals for Master Core and Slave Core
Configurable Shared Resources for Master Core and Slave Core
Programmable PLLs and Oscillator Clock Sources
Fast Wake-up and Start-up
Backup Internal Oscillator
Low-Power Management Modes (Sleep, Idle, Doze)
Integrated Power-on Reset and Brown-out Reset
Debugger Development Support
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