Zilog, 8bit Z80, Z80 Microcontroller, 10MHz ROMLess, 40-Pin PDIP
- RS Stock No.:
- 625-9078
- Mfr. Part No.:
- Z84C0010PEG
- Brand:
- Zilog
Currently unavailable
We don't know if this item will be back in stock, RS intend to remove it from our range soon.
- RS Stock No.:
- 625-9078
- Mfr. Part No.:
- Z84C0010PEG
- Brand:
- Zilog
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Zilog | |
| Family Name | Z80 | |
| Package Type | PDIP | |
| Mounting Type | Through Hole | |
| Pin Count | 40 | |
| Device Core | Z80 | |
| Data Bus Width | 8bit | |
| Maximum Frequency | 10MHz | |
| USB Channels | 0 | |
| Number of SPI Channels | 0 | |
| Number of USART Channels | 0 | |
| Typical Operating Supply Voltage | 4.5 → 5.5 V | |
| Number of UART Channels | 0 | |
| Number of I2C Channels | 0 | |
| Number of CAN Channels | 0 | |
| Number of PCI Channels | 0 | |
| Number of Ethernet Channels | 0 | |
| Number of LIN Channels | 0 | |
| Height | 4.19mm | |
| Dimensions | 62.74 x 14.22 x 4.19mm | |
| Width | 14.22mm | |
| Minimum Operating Temperature | -40 °C | |
| Maximum Operating Temperature | +100 °C | |
| Length | 62.74mm | |
| Program Memory Type | ROMLess | |
| Instruction Set Architecture | CISC | |
Select all | ||
|---|---|---|
Brand Zilog | ||
Family Name Z80 | ||
Package Type PDIP | ||
Mounting Type Through Hole | ||
Pin Count 40 | ||
Device Core Z80 | ||
Data Bus Width 8bit | ||
Maximum Frequency 10MHz | ||
USB Channels 0 | ||
Number of SPI Channels 0 | ||
Number of USART Channels 0 | ||
Typical Operating Supply Voltage 4.5 → 5.5 V | ||
Number of UART Channels 0 | ||
Number of I2C Channels 0 | ||
Number of CAN Channels 0 | ||
Number of PCI Channels 0 | ||
Number of Ethernet Channels 0 | ||
Number of LIN Channels 0 | ||
Height 4.19mm | ||
Dimensions 62.74 x 14.22 x 4.19mm | ||
Width 14.22mm | ||
Minimum Operating Temperature -40 °C | ||
Maximum Operating Temperature +100 °C | ||
Length 62.74mm | ||
Program Memory Type ROMLess | ||
Instruction Set Architecture CISC | ||