- RS Stock No.:
- 217-7931
- Mfr. Part No.:
- 9DB106BGILF
- Brand:
- Renesas Electronics
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Added
Price Each (In a Pack of 2)
£4.775
(exc. VAT)
£5.73
(inc. VAT)
Units | Per unit | Per Pack* |
2 - 8 | £4.775 | £9.55 |
10 - 18 | £4.28 | £8.56 |
20 - 48 | £4.20 | £8.40 |
50 - 98 | £4.05 | £8.10 |
100 + | £3.505 | £7.01 |
*price indicative |
- RS Stock No.:
- 217-7931
- Mfr. Part No.:
- 9DB106BGILF
- Brand:
- Renesas Electronics
Technical Reference
Legislation and Compliance
Product Details
The Renesas Electronics 9DB106 zero-delay buffer supports PCIe Gen1 and Gen2 clocking requirements. The 9DB106 is driven by a differential SRC output pair from an IDT CK410/CK505-compliant main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking. An SMBus interface allows control of the PLL bandwidth and bypass options, while 2 clock request (CLKREQ#) pins make the 9DB106 suitable for Express Card applications.
6 - 0.7 V current mode differential output pairs (HCSL)
CLKREQ# pin for outputs 1 and 4/ supports Express Card applications
PLL or bypass mode/PLL can dejitter incoming clock
Selectable PLL bandwidth/minimizes jitter peaking in downstream PLL's
Spread Spectrum Compatible/tracks spreading input clock for low EMI
SMBus Interface/unused outputs can be disabled
Cycle-to-cycle jitter < 50 ps
Output-to-output skew < 50 ps
CLKREQ# pin for outputs 1 and 4/ supports Express Card applications
PLL or bypass mode/PLL can dejitter incoming clock
Selectable PLL bandwidth/minimizes jitter peaking in downstream PLL's
Spread Spectrum Compatible/tracks spreading input clock for low EMI
SMBus Interface/unused outputs can be disabled
Cycle-to-cycle jitter < 50 ps
Output-to-output skew < 50 ps
Specifications
Attribute | Value |
---|---|
Number of Drivers | 6 |
Input Type | TTL |
Output Type | Buffer |
Number of Elements per Chip | 3 |
Package Type | TSSOP |
Pin Count | 20 |
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