Quad Bus Buffer Gate SN74LVC125AD
- RS Stock No.:
- 528-296
- Mfr. Part No.:
- SN74LVC125AD
- Brand:
- Texas Instruments
Stock information currently inaccessible
- RS Stock No.:
- 528-296
- Mfr. Part No.:
- SN74LVC125AD
- Brand:
- Texas Instruments
Specifications
Legislation and Compliance
Product Details
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Select all | Attribute | Value |
|---|---|---|
| Brand | Texas Instruments | |
| Logic Family | LVC | |
| Mounting Type | Surface Mount | |
| Package Type | SOIC | |
| Maximum Operating Temperature | +125 °C | |
| Minimum Operating Temperature | -40 °C | |
| Pin Count | 14 | |
| Maximum High Level Output Current | -24mA | |
| Maximum Low Level Output Current | 24mA | |
| Maximum Propagation Delay Time @ Maximum CL | 5.3 ns @ 2.7 V | |
| Dimensions | 8.65 x 3.91 x 1.58mm | |
| Maximum Operating Supply Voltage | 3.6 V | |
| Height | 1.58mm | |
| Minimum Operating Supply Voltage | 1.65 V | |
| Priced to Clear | Yes | |
| Width | 3.91mm | |
| Length | 8.65mm | |
| Propagation Delay Test Condition | 50pF | |
| Select all | ||
|---|---|---|
Brand Texas Instruments | ||
Logic Family LVC | ||
Mounting Type Surface Mount | ||
Package Type SOIC | ||
Maximum Operating Temperature +125 °C | ||
Minimum Operating Temperature -40 °C | ||
Pin Count 14 | ||
Maximum High Level Output Current -24mA | ||
Maximum Low Level Output Current 24mA | ||
Maximum Propagation Delay Time @ Maximum CL 5.3 ns @ 2.7 V | ||
Dimensions 8.65 x 3.91 x 1.58mm | ||
Maximum Operating Supply Voltage 3.6 V | ||
Height 1.58mm | ||
Minimum Operating Supply Voltage 1.65 V | ||
Priced to Clear Yes | ||
Width 3.91mm | ||
Length 8.65mm | ||
Propagation Delay Test Condition 50pF | ||
74LVC Family Inverters & Buffers, Texas Instruments
Texas Instruments range of Inverters and Buffers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22