Nexperia 74HC373D,653 8-Bit D Type Latch, Transparent, 3 State, 20-Pin SO
- RS Stock No.:
- 170-8000
- Mfr. Part No.:
- 74HC373D,653
- Brand:
- Nexperia
Subtotal (1 reel of 2000 units)*
£416.00
(exc. VAT)
£500.00
(inc. VAT)
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- 4,000 unit(s) shipping from 07 July 2026
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Units | Per unit | Per Reel* |
|---|---|---|
| 2000 + | £0.208 | £416.00 |
*price indicative
- RS Stock No.:
- 170-8000
- Mfr. Part No.:
- 74HC373D,653
- Brand:
- Nexperia
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Nexperia | |
| Product Type | D Type Latch | |
| Logic Family | 74HC | |
| Logic Function | D Type | |
| Latch Mode | Transparent | |
| Number of Bits | 8 | |
| Number of Channels | 8 | |
| Output Type | 3 State | |
| Polarity | Non-Inverting | |
| Mount Type | Surface | |
| Package Type | SO | |
| Minimum Supply Voltage | 2V | |
| Maximum Supply Voltage | 6V | |
| Pin Count | 20 | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 125°C | |
| Width | 7.6 mm | |
| Height | 2.45mm | |
| Series | 74HC | |
| Length | 13mm | |
| Standards/Approvals | No | |
| Automotive Standard | No | |
| Select all | ||
|---|---|---|
Brand Nexperia | ||
Product Type D Type Latch | ||
Logic Family 74HC | ||
Logic Function D Type | ||
Latch Mode Transparent | ||
Number of Bits 8 | ||
Number of Channels 8 | ||
Output Type 3 State | ||
Polarity Non-Inverting | ||
Mount Type Surface | ||
Package Type SO | ||
Minimum Supply Voltage 2V | ||
Maximum Supply Voltage 6V | ||
Pin Count 20 | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 125°C | ||
Width 7.6 mm | ||
Height 2.45mm | ||
Series 74HC | ||
Length 13mm | ||
Standards/Approvals No | ||
Automotive Standard No | ||
The 74HC373, 74HCT373 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE.
Mixed 5 V and 3.3 V applications
Save board space
Low cost interface solutions
Improved signal integrity for complex layouts
Wide supply voltage range
Low propagation delay
Overvoltage tolerant
Source termination
Low input threshold
CMOS low power
Key applications
Memory controllers
Backplane interfaces
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