Nexperia 74HCT573D,653 8-Bit D Type Latch, Transparent, 3 State, 20-Pin SO
- RS Stock No.:
- 170-7988
- Mfr. Part No.:
- 74HCT573D,653
- Brand:
- Nexperia
Subtotal (1 reel of 2000 units)*
£464.00
(exc. VAT)
£556.00
(inc. VAT)
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- Shipping from 28 August 2026
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Units | Per unit | Per Reel* |
|---|---|---|
| 2000 + | £0.232 | £464.00 |
*price indicative
- RS Stock No.:
- 170-7988
- Mfr. Part No.:
- 74HCT573D,653
- Brand:
- Nexperia
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Nexperia | |
| Product Type | D Type Latch | |
| Logic Family | 74HCT | |
| Latch Mode | Transparent | |
| Logic Function | D Type | |
| Number of Bits | 8 | |
| Number of Channels | 8 | |
| Output Type | 3 State | |
| Polarity | Non-Inverting | |
| Mount Type | Surface | |
| Minimum Supply Voltage | 4.5V | |
| Package Type | SO | |
| Pin Count | 20 | |
| Maximum Supply Voltage | 5.5V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 125°C | |
| Series | 74HCT | |
| Standards/Approvals | No | |
| Length | 13mm | |
| Width | 7.6 mm | |
| Height | 2.45mm | |
| Automotive Standard | No | |
| Select all | ||
|---|---|---|
Brand Nexperia | ||
Product Type D Type Latch | ||
Logic Family 74HCT | ||
Latch Mode Transparent | ||
Logic Function D Type | ||
Number of Bits 8 | ||
Number of Channels 8 | ||
Output Type 3 State | ||
Polarity Non-Inverting | ||
Mount Type Surface | ||
Minimum Supply Voltage 4.5V | ||
Package Type SO | ||
Pin Count 20 | ||
Maximum Supply Voltage 5.5V | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 125°C | ||
Series 74HCT | ||
Standards/Approvals No | ||
Length 13mm | ||
Width 7.6 mm | ||
Height 2.45mm | ||
Automotive Standard No | ||
The 74HC573, 74HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state.
Mixed 5 V and 3.3 V applications
Save board space
Low cost interface solutions
Improved signal integrity for complex layouts
Wide supply voltage range
Low propagation delay
Overvoltage tolerant
Source termination
Low input threshold
CMOS low power
Key applications
Memory controllers
Backplane interfaces
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