NXP 2-Channel I/O Expander TSSOP 10, PCA9615DPJ
- RS Stock No.:
- 219-4626
- Mfr. Part No.:
- PCA9615DPJ
- Brand:
- NXP
Bulk discount available
Subtotal (1 pack of 5 units)*
£21.85
(exc. VAT)
£26.20
(inc. VAT)
Add 15 units to get free delivery
In Stock
- 65 unit(s) ready to ship
- Plus 1,810 unit(s) shipping from 12 February 2026
Need more? Click ‘Check delivery dates’ to find extra stock and lead times.
Units | Per unit | Per Pack* |
|---|---|---|
| 5 - 45 | £4.37 | £21.85 |
| 50 - 95 | £4.218 | £21.09 |
| 100 - 245 | £4.104 | £20.52 |
| 250 - 995 | £3.968 | £19.84 |
| 1000 + | £3.854 | £19.27 |
*price indicative
- RS Stock No.:
- 219-4626
- Mfr. Part No.:
- PCA9615DPJ
- Brand:
- NXP
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | NXP | |
| Product Type | I/O Expander | |
| Number of I/O Channels | 2 | |
| Package Type | TSSOP | |
| Clock Frequency | 1MHz | |
| Mount Type | Surface | |
| Maximum Supply Voltage | 5.5V | |
| Minimum Supply Voltage | 2.3V | |
| Pin Count | 10 | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Width | 3.1 mm | |
| Height | 1.1mm | |
| Length | 3.1mm | |
| Standards/Approvals | No | |
| Series | PCA9615 | |
| Automotive Standard | No | |
| Select all | ||
|---|---|---|
Brand NXP | ||
Product Type I/O Expander | ||
Number of I/O Channels 2 | ||
Package Type TSSOP | ||
Clock Frequency 1MHz | ||
Mount Type Surface | ||
Maximum Supply Voltage 5.5V | ||
Minimum Supply Voltage 2.3V | ||
Pin Count 10 | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Width 3.1 mm | ||
Height 1.1mm | ||
Length 3.1mm | ||
Standards/Approvals No | ||
Series PCA9615 | ||
Automotive Standard No | ||
The NXP PCA9615 is a Fast mode Plus (Fm+) SMBus or I2C bus buffer that extends the normal single ended SMBus or I2C bus through electrically noisy environments using a differential SMBus or I2C bus (dI2C) physical layer, which is transparent to the SMBus or I2C bus protocol layer. It consists of two single ended to differential driver channels for the SCL (serial clock) and SDA (serial data).
Lock-up free operation
Supports arbitration and clock stretching across the dI2C-bus buffers
Powered-off and powering-up high-impedance I2C-bus pins
Related links
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