ROHM BR25G512FJ-5AE2, 512kbit EEPROM Chip 8-Pin SOP-J8 SPI

The ROHM 512Kbit serial EEPROM with an SPI bus interface features multiple write protection mechanisms, including write prohibition at power-on, WPB pin protection, and block setting. It prevents write mistakes at low voltage and ensures reliable data storage. Data at shipment includes a memory array set to FFh, an ID page set to FFh, and a status register with WPEN, BP1, BP0 set to 0, 0, 0, and lock status LS set to 0.

128-byte write lockable identification page ID page
Address auto-increment function at read operation
Auto erase and auto end function at data rewrite
Write protect block setting by software
HOLD function by the HOLDB pin