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Microchip DSPIC33EV, 16 bit Digital Signal Processor 70 MHz 256kB FLASH 44-Pin TQFP

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£94.75

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£113.75

(inc. VAT)

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100 +£3.64

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Packaging Options:
RS Stock No.:
869-6110P
Mfr. Part No.:
DSPIC33EV256GM104-I/PT
Brand:
Microchip
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Brand

Microchip

Product Type

Digital Signal Processor

Maximum Clock Frequency

70MHz

Series

DSPIC33EV

Device Million Instructions per Second

70MIPS

Data Bus Width

16bit

RAM Size

16kB

Core

dsPIC33E

Instruction Set Architecture

C

Program Memory Size

256kB

Program Memory Type

FLASH

Minimum Supply Voltage

4.5V

Maximum Supply Voltage

5.5V

Mount Type

Surface

Package Type

TQFP

Number of ADCs

1

Number of PWM Channels

6

Minimum Operating Temperature

-40°C

Pin Count

44

Maximum Operating Temperature

85°C

Length

10mm

Height

1.1mm

Standards/Approvals

AEC-Q100, IEC 60730

Automotive Standard

AEC-Q100 Rev G Grade 1, AEC-Q100 Rev G Grade 0

Number of PWM Units

3

ADC Channels

1

ADC Resolution

12bit

Timer Resolution

32bit

Number of Cores

1

PWM Resolution

7.14ns

dsPIC33EVxxxGM00x/10x 16-Bit Digital Signal Controllers


Microchip’s dsPIC33EV family of 16-bit Digital Signal Controllers (DSCs) features a 70 MIPS dsPIC® DSC core with enhanced on-chip features. Capable of operating in harsh environments these devices are suitable for appliance and automotive applications. Rich peripheral integration includes SENT (Single-Edge Nibble Transmission-Transmit/Receive), High Speed PWMs, OP Amps and Error Correcting Code Flash for increased reliability and safety. The performance offered by the dsPIC33EV family of MCUs allows them to be incorporated into the design of high-performance, precision motor control systems that are more energy efficient. They can be used to control BLDC, permanent magnet synchronous, AC induction and stepper motors.

Microcontroller Features


70 MHz Max. CPU Speed

Code-Efficient (C and Assembly) Architecture

16-Bit Wide Data Path

Two 40-Bit Wide Accumulators

Single-Cycle (MAC/MPY) with Dual Data Fetch

Single-Cycle, Mixed-Sign MUL plus Hardware Divide

32-Bit Multiply Support

Intermediate Security for Memory - Provides a Boot Flash Segment in addition to the existing General Flash Segment

Error Code Correction (ECC) for Flash

Added Two Alternate Register Sets for Fast Context Switching

Clock Management Features


Internal, 15% Low-Power RC (LPRC) – 32 kHz

Internal, 1% Fast RC (FRC) – 7.37 MHz

Internal, 10% Backup RC (BFRC) – 7.37 MHz

Programmable PLLs and Oscillator Clock Sources

Fail-Safe Clock Monitor (FSCM)

Additional Fail-Safe Clock Monitor Source (BFRC), Intended to Provide a Clock Fail Switch Source for the System Clock

Independent Watchdog Timer (WDT)

System Windowed Watchdog Timer (DMT)

Fast Wake-Up and Start-Up

Power Management Features


Low-Power Management modes (Sleep, Idle and Doze)

Power Consumption Minimized Executing NOP String

Integrated Power-on Reset (POR) and Brown-out Reset (BOR)

0.5 mA/MHz Dynamic Current (typical)

50 μA at +25°C IPD Current (typical)

Peripheral Features


Up to Six Pulse-Width Modulation (PWM) Outputs (three generators)

Configurable Analogue to Digital Converter (ADC) Module

Up to 4 Operational Amplifiers

Up to 5 Comparators

Charge Time Measurement Unit (CTMU) - Supports mTouch™ capacitive touch sensing

Five 16-bit Timers

Two 32-bit Timers

Four Output Capture modules Configurable as Timers/Counters

Four Input Capture modules

Two Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART)

Two SPI Modules

One I2C Module with SMBus Support

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