Microchip ATF1508AS-10JU84, CPLD ATF1508AS EEPROM 128 Cells, 84 I/O, 128 Labs, 10ns, ISP, 84-Pin PLCC
- RS Stock No.:
- 177-1659
- Mfr. Part No.:
- ATF1508AS-10JU84
- Brand:
- Microchip
Unavailable
RS will no longer stock this product.
- RS Stock No.:
- 177-1659
- Mfr. Part No.:
- ATF1508AS-10JU84
- Brand:
- Microchip
Specifications
Technical Reference
Legislation and Compliance
Product Details
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Select all | Attribute | Value |
|---|---|---|
| Brand | Microchip | |
| Family Name | ATF1508AS | |
| Number of Macro Cells | 128 | |
| Number of User I/Os | 84 | |
| Memory Type | EEPROM | |
| Number of Logic Blocks/Elements | 128 | |
| In System Programmability | In System | |
| Mounting Type | Surface Mount | |
| Package Type | PLCC | |
| Pin Count | 84 | |
| Maximum Operating Temperature | +85 °C | |
| Minimum Operating Temperature | -40 °C | |
| Propagation Delay | 10ns | |
| Individual Output Enable Control | Yes | |
| Dimensions | 29.41 x 29.41 x 4.06mm | |
| Height | 4.06mm | |
| Length | 29.41mm | |
| Maximum Operating Supply Voltage | 5.5 V | |
| Re-programmability Support | Yes | |
| Width | 29.41mm | |
| Minimum Operating Supply Voltage | 4.5 V | |
| Propagation Delay Test Condition | 35pF | |
| Select all | ||
|---|---|---|
Brand Microchip | ||
Family Name ATF1508AS | ||
Number of Macro Cells 128 | ||
Number of User I/Os 84 | ||
Memory Type EEPROM | ||
Number of Logic Blocks/Elements 128 | ||
In System Programmability In System | ||
Mounting Type Surface Mount | ||
Package Type PLCC | ||
Pin Count 84 | ||
Maximum Operating Temperature +85 °C | ||
Minimum Operating Temperature -40 °C | ||
Propagation Delay 10ns | ||
Individual Output Enable Control Yes | ||
Dimensions 29.41 x 29.41 x 4.06mm | ||
Height 4.06mm | ||
Length 29.41mm | ||
Maximum Operating Supply Voltage 5.5 V | ||
Re-programmability Support Yes | ||
Width 29.41mm | ||
Minimum Operating Supply Voltage 4.5 V | ||
Propagation Delay Test Condition 35pF | ||
- COO (Country of Origin):
- PH
Microchip Technology CPLD
The Microchip Technology ATF1508AS family, PLCC package, surface mount, 84-pin, high performance, a high-density complex programmable logic device (CPLD) is an electrically erasable device. It has a voltage rating between 3.3V and 5V. The (CPLD) is designed with 128 logic macrocells and up to 84 inputs. This device easily integrates logic from several TTL, SSI, MSI, LSI and classic PLDs.
Features and Benefits
• 84 bidirectional I/O pins and four dedicated input pins depending on the type of device package selected
• Advanced EE technology
• Advanced power management
• D/T/Latch configurable flip flops
• EEPROM memory type
• Green (Pb/Halide-free) package options
• In-system programmability (ISP) via JTAG
• Integrated power-on reset and brown-out reset
• JTAG boundary scan testing
• Operating frequency is 125MHz
• Operating temperature ranges between -40°C and 85°C
• Pin-to-pin delay is 7.5ns
• Propagation delay is 10ns
• Security fuse
• Three global clock pins
• Advanced EE technology
• Advanced power management
• D/T/Latch configurable flip flops
• EEPROM memory type
• Green (Pb/Halide-free) package options
• In-system programmability (ISP) via JTAG
• Integrated power-on reset and brown-out reset
• JTAG boundary scan testing
• Operating frequency is 125MHz
• Operating temperature ranges between -40°C and 85°C
• Pin-to-pin delay is 7.5ns
• Propagation delay is 10ns
• Security fuse
• Three global clock pins
Applications
• Digital designs
• Electronic product designers
• Electronic product designers