Microchip ATF1504AS-10JU84, CPLD ATF1504AS EEPROM 64 Cells, 64 I/O, 4 Labs, 10ns, ISP, 84-Pin PLCC
- RS Stock No.:
- 171-7831
- Mfr. Part No.:
- ATF1504AS-10JU84
- Brand:
- Microchip
Unavailable
RS will no longer stock this product.
- RS Stock No.:
- 171-7831
- Mfr. Part No.:
- ATF1504AS-10JU84
- Brand:
- Microchip
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Microchip | |
| Family Name | ATF1504AS | |
| Number of Macro Cells | 64 | |
| Number of User I/Os | 64 | |
| Memory Type | EEPROM | |
| Number of Logic Blocks/Elements | 4 | |
| In System Programmability | In System | |
| Mounting Type | Surface Mount | |
| Package Type | PLCC | |
| Minimum Operating Temperature | -40 °C | |
| Pin Count | 84 | |
| Maximum Operating Temperature | +85 °C | |
| Propagation Delay | 10ns | |
| Individual Output Enable Control | Yes | |
| Dimensions | 29.41 x 29.41 x 4.06mm | |
| Height | 4.06mm | |
| Maximum Operating Supply Voltage | 5.5 V | |
| Length | 29.41mm | |
| Propagation Delay Test Condition | 35pF | |
| Width | 29.41mm | |
| Minimum Operating Supply Voltage | 4.5 V | |
Select all | ||
|---|---|---|
Brand Microchip | ||
Family Name ATF1504AS | ||
Number of Macro Cells 64 | ||
Number of User I/Os 64 | ||
Memory Type EEPROM | ||
Number of Logic Blocks/Elements 4 | ||
In System Programmability In System | ||
Mounting Type Surface Mount | ||
Package Type PLCC | ||
Minimum Operating Temperature -40 °C | ||
Pin Count 84 | ||
Maximum Operating Temperature +85 °C | ||
Propagation Delay 10ns | ||
Individual Output Enable Control Yes | ||
Dimensions 29.41 x 29.41 x 4.06mm | ||
Height 4.06mm | ||
Maximum Operating Supply Voltage 5.5 V | ||
Length 29.41mm | ||
Propagation Delay Test Condition 35pF | ||
Width 29.41mm | ||
Minimum Operating Supply Voltage 4.5 V | ||
Microchip Technology CPLD
The Microchip Technology ATF1504AS family, PLCC package, surface mount, 84-pin, high performance, a high-density complex programmable logic device (CPLD) is an electrically erasable device. It has a voltage rating between 3.3V and 5V. The (CPLD) is designed with 64 logic macrocells and up to 68 inputs. This device easily integrates logic from several TTL, SSI, MSI, LSI and classic PLDs.
Features and Benefits
• 68 bidirectional I/O pins and four dedicated input pins depending on the type of device package selected
• Advanced EE technology
• Advanced power management
• D/T/Latch configurable flip flops
• EEPROM memory type
• Green (Pb/Halide-free) package options
• In-system programmability (ISP) via JTAG
• Integrated power-on reset and brown-out reset
• JTAG boundary scan testing
• Operating frequency is 125MHz
• Operating temperature ranges between -40°C and 85°C
• Propagation delay is 10ns
• Security fuse feature
• Three global clock pin
• Advanced EE technology
• Advanced power management
• D/T/Latch configurable flip flops
• EEPROM memory type
• Green (Pb/Halide-free) package options
• In-system programmability (ISP) via JTAG
• Integrated power-on reset and brown-out reset
• JTAG boundary scan testing
• Operating frequency is 125MHz
• Operating temperature ranges between -40°C and 85°C
• Propagation delay is 10ns
• Security fuse feature
• Three global clock pin
Applications
• Digital designs
• Electronic product designers
• Electronic product designers