Nexperia 74HCT164D,653 8-stage Surface Mount Shift Register 74HCT, 14-Pin SOIC
- RS Stock No.:
- 170-5521
- Mfr. Part No.:
- 74HCT164D,653
- Brand:
- Nexperia
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Units | Per unit | Per Pack* |
---|---|---|
50 - 100 | £0.209 | £10.45 |
150 - 250 | £0.112 | £5.60 |
300 - 550 | £0.106 | £5.30 |
600 - 1200 | £0.101 | £5.05 |
1250 + | £0.09 | £4.50 |
*price indicative
- RS Stock No.:
- 170-5521
- Mfr. Part No.:
- 74HCT164D,653
- Brand:
- Nexperia
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
---|---|---|
Brand | Nexperia | |
Package Type | SO | |
Logic Function | Shift Register | |
Number of Stages | 8 | |
Logic Family | 74HCT | |
Mounting Type | Surface Mount | |
Operation Mode | Serial to Parallel | |
Number of Elements | 1 | |
Pin Count | 14 | |
Minimum Operating Supply Voltage | 4.5 V | |
Maximum Operating Supply Voltage | 5.5 V | |
Dimensions | 8.75 x 4 x 1.45mm | |
Reset Type | Asynchronous | |
Maximum Operating Temperature | 125 °C | |
Preset Type | Asynchronous | |
Direction Type | Uni-Directional | |
Triggering Type | Positive Edge | |
Minimum Operating Temperature | -40 °C | |
Select all | ||
---|---|---|
Brand Nexperia | ||
Package Type SO | ||
Logic Function Shift Register | ||
Number of Stages 8 | ||
Logic Family 74HCT | ||
Mounting Type Surface Mount | ||
Operation Mode Serial to Parallel | ||
Number of Elements 1 | ||
Pin Count 14 | ||
Minimum Operating Supply Voltage 4.5 V | ||
Maximum Operating Supply Voltage 5.5 V | ||
Dimensions 8.75 x 4 x 1.45mm | ||
Reset Type Asynchronous | ||
Maximum Operating Temperature 125 °C | ||
Preset Type Asynchronous | ||
Direction Type Uni-Directional | ||
Triggering Type Positive Edge | ||
Minimum Operating Temperature -40 °C | ||
- COO (Country of Origin):
- TH
The 74HC164: 74HCT164 is an 8-bit serial-in/parallel-out shift register. The device features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enable for data entry through the other input. Data is shifted on the LOW‑to‑HIGH transitions of the clock (CP) input. A LOW on the master reset input (MR) clears the register and forces all outputs LOW, independently of other inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Simple control interface
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Asynchronous and synchronous load options
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