Renesas Electronics 8T39S11ANLGI Clock Buffer 48-Pin 48-Lead VFQFN, Lead-Free
- RS Stock No.:
- 264-3519
- Mfr. Part No.:
- 8T39S11ANLGI
- Brand:
- Renesas Electronics
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Subtotal (1 unit)*
£13.46
(exc. VAT)
£16.15
(inc. VAT)
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In Stock
- 253 unit(s) ready to ship
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Units | Per unit |
|---|---|
| 1 - 9 | £13.46 |
| 10 - 24 | £12.39 |
| 25 - 49 | £11.87 |
| 50 - 99 | £11.63 |
| 100 + | £10.46 |
*price indicative
- RS Stock No.:
- 264-3519
- Mfr. Part No.:
- 8T39S11ANLGI
- Brand:
- Renesas Electronics
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Renesas Electronics | |
| Maximum Supply Current | 174 mA | |
| Maximum Input Frequency | 40MHz | |
| Mounting Type | Surface Mount | |
| Package Type | 48-Lead VFQFN, Lead-Free | |
| Pin Count | 48 | |
Select all | ||
|---|---|---|
Brand Renesas Electronics | ||
Maximum Supply Current 174 mA | ||
Maximum Input Frequency 40MHz | ||
Mounting Type Surface Mount | ||
Package Type 48-Lead VFQFN, Lead-Free | ||
Pin Count 48 | ||
- COO (Country of Origin):
- TH
The Renesas Electronics Crystal or differential to Differential is a high performance clock fan-out buffer. The input clock can be selected from two differential inputs or one crystal input. The internal oscillator circuit is automatically disabled if the crystal input is not selected. The crystal pin can be driven by a single ended clock. The selected signal is distributed to ten differential outputs which can be configured as LVPECL LVDS or HSCL outputs. All outputs can be disabled into a high impedance state.
48 Lead VFQFN with lead free package available
Two differential reference clock input pairs
Crystal Input accepts 10MHz to 40MHz Crystal or Single Ended clock
Two banks and each has five differential output pairs that can be configured as LVPECL or LVDS or HCSL
Two differential reference clock input pairs
Crystal Input accepts 10MHz to 40MHz Crystal or Single Ended clock
Two banks and each has five differential output pairs that can be configured as LVPECL or LVDS or HCSL
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