Renesas Electronics 9DB233AGILF Clock Buffer 20-Pin TSSOP
- RS Stock No.:
- 263-7983P
- Mfr. Part No.:
- 9DB233AGILF
- Brand:
- Renesas Electronics
Bulk discount available
Subtotal 10 units (supplied in a tube)*
£31.30
(exc. VAT)
£37.60
(inc. VAT)
FREE delivery for orders over £50.00
In Stock
- 104 unit(s) ready to ship
- Plus 999,999,894 unit(s) shipping from 01 January 2026
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Units | Per unit |
---|---|
10 - 18 | £3.13 |
20 - 24 | £3.07 |
26 - 72 | £2.955 |
74 + | £2.56 |
*price indicative
- RS Stock No.:
- 263-7983P
- Mfr. Part No.:
- 9DB233AGILF
- Brand:
- Renesas Electronics
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
---|---|---|
Brand | Renesas Electronics | |
Number of Elements per Chip | 4 | |
Maximum Supply Current | 80 mA | |
Maximum Input Frequency | 110MHz | |
Mounting Type | SMD | |
Package Type | TSSOP | |
Pin Count | 20 | |
Select all | ||
---|---|---|
Brand Renesas Electronics | ||
Number of Elements per Chip 4 | ||
Maximum Supply Current 80 mA | ||
Maximum Input Frequency 110MHz | ||
Mounting Type SMD | ||
Package Type TSSOP | ||
Pin Count 20 | ||
- COO (Country of Origin):
- TW
The Renesas Electronics zero-delay buffer supports PCIe Gen1 and Gen2 clocking requirements. It is driven by a differential SRC output pair from an IDT main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without spread-spectrum clocking.
SMBus Interface
Selectable PLL bandwidth
Minimizes jitter peaking in downstream PLLs
Cycle-to-cycle jitter < 50ps
Output-to-output skew < 50 ps
PCIe Gen3 phase jitter < 1.0ps RMS
Selectable PLL bandwidth
Minimizes jitter peaking in downstream PLLs
Cycle-to-cycle jitter < 50ps
Output-to-output skew < 50 ps
PCIe Gen3 phase jitter < 1.0ps RMS