The SY54020AR is a Fully differential, low voltage 1.2 V/1.8 V/ 2.5 V CML 1:4 Fanout Buffer with active-low Enable (/EN). The Enable is synchronous so that the outputs will only be enable/disabled when they are already in the LOW state. This avoids any chance of generating a runt clock pulse when the device is enabled/disabled as can happen with an asynchronous control. The SY54020AR can process clock signals as fast as 3.2 GHz or data patterns up to 3.2 Gbps.
1.2V/1.8V/2.5V CML 1:4 Fanout Buffer Active-low Enable Input to Disable the Output Guaranteed AC performance over temperature and Voltage DC-to >3.2Gbps Data throughput DC-to >3.2Gbps Clock throughput <320ps Propagation delay (IN-to-Q) <20ps Within-device Skew <100ps rise/fall Times Ultra-Low Jitter Desigh <1psrms Cycle-to-Cycle Jitter High-Speed CML Output 2.5V ±5% Vcc, 1.2/1.8V/2.5V ±5% Vcco Power Supply Operation Industrial Temperature:-40°C to +85°C Available in 16 pin (3mm x 3 mm) MLF Package