Microchip SRAM, 47L64-I/SN- 64kbit

Standby current: 500 μA (maximum)

Hibernate current: 3 μA (maximum)
Cell-Based Non-volatile Backup mirrors SRAM array cell-for-cell and transfers all data to/from SRAM cells in parallel (all cells at same time)
Invisible-to-User Data Transfers: VCC level monitored inside device, SRAM automatically saved on power disrupt, SRAM automatically restored on VCC return
100,000 Backups Minimum (at 20°C)
100 years retention (at 20°C)