The Cypress Semiconductor CY7C1360C SRAM integrates 256K ´ 36 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered clock input.

Provide high performance 3-1-1-1 access rate
User selectable burst counter supporting Intel Pentium interleaved or linear burst sequences
Separate processor and controller address strobes
Synchronous self-timed writes
Asynchronous output enable
Single cycle chip deselect