Winbond W9412G6KH-5I, SDRAM 128Mbit Surface Mount, 200MHz, 66-Pin TSOP
- RS Stock No.:
- 188-2574
- Mfr. Part No.:
- W9412G6KH-5I
- Brand:
- Winbond
Stock information currently inaccessible
- RS Stock No.:
- 188-2574
- Mfr. Part No.:
- W9412G6KH-5I
- Brand:
- Winbond
Specifications
Technical Reference
Legislation and Compliance
Product Details
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Select all | Attribute | Value |
|---|---|---|
| Brand | Winbond | |
| Memory Size | 128Mbit | |
| Organisation | 16M x 8 bit | |
| Data Rate | 200MHz | |
| Number of Bits per Word | 8bit | |
| Number of Words | 16M | |
| Mounting Type | Surface Mount | |
| Package Type | TSOP | |
| Pin Count | 66 | |
| Dimensions | 22.35 x 10.29 x 1.05mm | |
| Height | 1.05mm | |
| Length | 22.35mm | |
| Maximum Operating Temperature | +85 °C | |
| Maximum Operating Supply Voltage | 2.7 V | |
| Minimum Operating Supply Voltage | 2.3 V | |
| Width | 10.29mm | |
| Minimum Operating Temperature | -40 °C | |
| Select all | ||
|---|---|---|
Brand Winbond | ||
Memory Size 128Mbit | ||
Organisation 16M x 8 bit | ||
Data Rate 200MHz | ||
Number of Bits per Word 8bit | ||
Number of Words 16M | ||
Mounting Type Surface Mount | ||
Package Type TSOP | ||
Pin Count 66 | ||
Dimensions 22.35 x 10.29 x 1.05mm | ||
Height 1.05mm | ||
Length 22.35mm | ||
Maximum Operating Temperature +85 °C | ||
Maximum Operating Supply Voltage 2.7 V | ||
Minimum Operating Supply Voltage 2.3 V | ||
Width 10.29mm | ||
Minimum Operating Temperature -40 °C | ||
The W9412G6KH is a 128M DDR SDRAM and speed involving -5/-5I/-6I.
2.5V ±0.2V Power Supply for DDR400/333
2.4V∼2.7V Power Supply for DDR500
Up to 250 MHz Clock Frequency
Double Data Rate architecture, two data transfers per clock cycle
Differential clock inputs (CLK and /CLK)
DQS is edge-aligned with data for Read, center-aligned with data for Write
CAS Latency: 2, 2.5, and 3
Burst Length: 2, 4 and 8
Auto Refresh and Self Refresh
Precharged Power Down and Active Power Down
Write Data Mask
Write Latency = 1
15.6 μS Refresh interval (4K/64 mS Refresh)
Maximum burst refresh cycle: 8
Interface: SSTL_2
2.4V∼2.7V Power Supply for DDR500
Up to 250 MHz Clock Frequency
Double Data Rate architecture, two data transfers per clock cycle
Differential clock inputs (CLK and /CLK)
DQS is edge-aligned with data for Read, center-aligned with data for Write
CAS Latency: 2, 2.5, and 3
Burst Length: 2, 4 and 8
Auto Refresh and Self Refresh
Precharged Power Down and Active Power Down
Write Data Mask
Write Latency = 1
15.6 μS Refresh interval (4K/64 mS Refresh)
Maximum burst refresh cycle: 8
Interface: SSTL_2