Winbond W9751G6KB-25/TRAY, DDR2 SDRAM Memory 512Mbit Surface Mount, 800MHz, 84-Pin WBGA
- RS Stock No.:
- 171-2199
- Mfr. Part No.:
- W9751G6KB-25/TRAY
- Brand:
- Winbond
Unavailable
RS will no longer stock this product.
- RS Stock No.:
- 171-2199
- Mfr. Part No.:
- W9751G6KB-25/TRAY
- Brand:
- Winbond
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Winbond | |
| Memory Size | 512Mbit | |
| SDRAM Class | DDR2 | |
| Organisation | 32 M x 16 bit | |
| Data Rate | 800MHz | |
| Data Bus Width | 16bit | |
| Address Bus Width | 32bit | |
| Number of Bits per Word | 16M | |
| Number of Words | 32M | |
| Mounting Type | Surface Mount | |
| Package Type | WBGA | |
| Pin Count | 84 | |
| Dimensions | 8.1 x 12.6 x 0.8mm | |
| Height | 0.8mm | |
| Length | 8.1mm | |
| Maximum Operating Temperature | +85 °C | |
| Maximum Operating Supply Voltage | 1.9 V | |
| Minimum Operating Temperature | 0 °C | |
| Minimum Operating Supply Voltage | 1.7 V | |
| Width | 12.6mm | |
| Select all | ||
|---|---|---|
Brand Winbond | ||
Memory Size 512Mbit | ||
SDRAM Class DDR2 | ||
Organisation 32 M x 16 bit | ||
Data Rate 800MHz | ||
Data Bus Width 16bit | ||
Address Bus Width 32bit | ||
Number of Bits per Word 16M | ||
Number of Words 32M | ||
Mounting Type Surface Mount | ||
Package Type WBGA | ||
Pin Count 84 | ||
Dimensions 8.1 x 12.6 x 0.8mm | ||
Height 0.8mm | ||
Length 8.1mm | ||
Maximum Operating Temperature +85 °C | ||
Maximum Operating Supply Voltage 1.9 V | ||
Minimum Operating Temperature 0 °C | ||
Minimum Operating Supply Voltage 1.7 V | ||
Width 12.6mm | ||
The W9751G6KB is a 512M bits DDR2 SDRAM, and speed involving -18, 18I, -25, 25L, 25I and -3
Double Data Rate architecture: two data transfers per clock cycle
CAS Latency: 3, 4, 5, 6 and 7
Burst Length: 4 and 8
Bi-directional, differential data strobes (DQS and /DQS ) are transmitted / received with data
Edge-aligned with Read data and center-aligned with Write data
DLL aligns DQ and DQS transitions with clock
Differential clock inputs (CLK and /CLK)
Data masks (DM) for write data
Off-Chip-Driver impedance adjustment (OCD) and On-Die-Termination (ODT) for better signal quality
Auto-precharge operation for read and write bursts
Auto Refresh and Self Refresh modes
Precharged Power Down and Active Power Down
CAS Latency: 3, 4, 5, 6 and 7
Burst Length: 4 and 8
Bi-directional, differential data strobes (DQS and /DQS ) are transmitted / received with data
Edge-aligned with Read data and center-aligned with Write data
DLL aligns DQ and DQS transitions with clock
Differential clock inputs (CLK and /CLK)
Data masks (DM) for write data
Off-Chip-Driver impedance adjustment (OCD) and On-Die-Termination (ODT) for better signal quality
Auto-precharge operation for read and write bursts
Auto Refresh and Self Refresh modes
Precharged Power Down and Active Power Down