Microchip Physical Layer Transceiver 24-Pin QFN, KSZ8081RNACA
- RS Stock No.:
- 215-3275P
- Mfr. Part No.:
- KSZ8081RNACA
- Brand:
- Microchip
Subtotal 10 units (supplied in a tray)*
£8.24
(exc. VAT)
£9.89
(inc. VAT)
FREE delivery for orders over £50.00
In Stock
- 14,500 unit(s) ready to ship
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Units | Per unit |
|---|---|
| 10 + | £0.824 |
*price indicative
- RS Stock No.:
- 215-3275P
- Mfr. Part No.:
- KSZ8081RNACA
- Brand:
- Microchip
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Microchip | |
| Typical Data Rate | 100Mbps | |
| Integrated CDR | No | |
| Power Supply Type | Single | |
| Typical Operating Supply Voltage | 3.3 V | |
| JTAG Support | No | |
| Package Type | QFN | |
| Pin Count | 24 | |
Select all | ||
|---|---|---|
Brand Microchip | ||
Typical Data Rate 100Mbps | ||
Integrated CDR No | ||
Power Supply Type Single | ||
Typical Operating Supply Voltage 3.3 V | ||
JTAG Support No | ||
Package Type QFN | ||
Pin Count 24 | ||
The Microchip KSZ8081RNA/RND is a single-supply 10BASE-T/100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair (UTP) cable. It is a highly-integrated PHY solution. It reduces board cost and simplifies board layout by using on-chip termination resistors for the differential pairs and by integrating a low-noise regulator to supply the 1.2V core, and by offering 1.8/2.5/3.3V digital I/O interface support.
Single-Chip 10BASE-T/100BASE-TX IEEE 802.3
Compliant Ethernet Transceiver
RMII v1.2 Interface Support with a 50 MHz Reference Clock Output to MAC, and an Option to Input a 50 MHz Reference Clock
RMII Back-to-Back Mode Support for a 100 Mbps Copper Repeater
MDC/MDIO Management Interface for PHY Register Configuration
Programmable Interrupt Output
LED Outputs for Link and Activity Status Indication
Compliant Ethernet Transceiver
RMII v1.2 Interface Support with a 50 MHz Reference Clock Output to MAC, and an Option to Input a 50 MHz Reference Clock
RMII Back-to-Back Mode Support for a 100 Mbps Copper Repeater
MDC/MDIO Management Interface for PHY Register Configuration
Programmable Interrupt Output
LED Outputs for Link and Activity Status Indication