Nexperia 74LVC4245APW,112 Bus Transceiver, 1, Bus Transceiver, Non-Inverting, 24-Pin TSSOP
- RS Stock No.:
- 380-0500
- Mfr. Part No.:
- 74LVC4245APW,112
- Brand:
- Nexperia
Currently unavailable
We don't know if this item will be back in stock, RS intend to remove it from our range soon.
- RS Stock No.:
- 380-0500
- Mfr. Part No.:
- 74LVC4245APW,112
- Brand:
- Nexperia
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Nexperia | |
| Logic Family | LVC | |
| Logic Function | Bus Transceiver | |
| Number of Elements per Chip | 1 | |
| Pin Count | 24 | |
| Polarity | Non-Inverting | |
| Mounting Type | Surface Mount | |
| Package Type | TSSOP | |
| Dimensions | 7.9 x 4.5 x 0.95mm | |
| Maximum Operating Supply Voltage | 3.6 V, 5.5 V | |
| Minimum Operating Temperature | -40 °C | |
| Maximum Operating Temperature | +125 °C | |
| Minimum Operating Supply Voltage | 1.5 V | |
Select all | ||
|---|---|---|
Brand Nexperia | ||
Logic Family LVC | ||
Logic Function Bus Transceiver | ||
Number of Elements per Chip 1 | ||
Pin Count 24 | ||
Polarity Non-Inverting | ||
Mounting Type Surface Mount | ||
Package Type TSSOP | ||
Dimensions 7.9 x 4.5 x 0.95mm | ||
Maximum Operating Supply Voltage 3.6 V, 5.5 V | ||
Minimum Operating Temperature -40 °C | ||
Maximum Operating Temperature +125 °C | ||
Minimum Operating Supply Voltage 1.5 V | ||
- COO (Country of Origin):
- TH
74LVC Family Bus Transceivers, Nexperia
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
The 74LVC4245A is an octal dual supply translating transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. It is designed to interface between a 3 V and 5 V bus in a mixed 3 V and 5 V supply environment. The device features an output enable input (pin OE) for easy cascading and a send/receive input (pin DIR) for direction control. Pin OE controls the outputs so that the buses are effectively isolated. In suspend mode, when VCC(A) is zero, there will be no current flow from one supply to the other supply. The A-outputs must be set 3-state and the voltage on the A-bus must be smaller than Vdiode (typical 0.7 V). VCC(A) ≥ VCC(B), except in suspend mode.
Wide supply voltage range
Low propagation delay
Low power suspend mode
Auto-direction sensing
3-state output options
Overvoltage tolerant options
Low propagation delay
Low power suspend mode
Auto-direction sensing
3-state output options
Overvoltage tolerant options
74LVC Family