Microchip PIC, PIC Microcontroller, 64 kB Flash, 44-Pin QFP
- RS Stock No.:
- 236-8944P
- Mfr. Part No.:
- PIC18F46Q10-I/PT
- Brand:
- Microchip
Bulk discount available
Subtotal 10 units (supplied in a tray)*
£11.18
(exc. VAT)
£13.42
(inc. VAT)
FREE delivery for orders over £50.00
In Stock
- 165 unit(s) ready to ship
Need more? Click ‘Check delivery dates’ to find extra stock and lead times.
Units | Per unit |
---|---|
10 - 20 | £1.118 |
25 - 45 | £1.028 |
50 - 70 | £1.008 |
75 + | £0.988 |
*price indicative
- RS Stock No.:
- 236-8944P
- Mfr. Part No.:
- PIC18F46Q10-I/PT
- Brand:
- Microchip
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
---|---|---|
Brand | Microchip | |
Family Name | PIC | |
Package Type | QFP | |
Mounting Type | Surface Mount | |
Pin Count | 44 | |
Device Core | PIC | |
Program Memory Size | 64 kB | |
Program Memory Type | Flash | |
Select all | ||
---|---|---|
Brand Microchip | ||
Family Name PIC | ||
Package Type QFP | ||
Mounting Type Surface Mount | ||
Pin Count 44 | ||
Device Core PIC | ||
Program Memory Size 64 kB | ||
Program Memory Type Flash | ||
The Microchip microcontroller features analog, core independent, and communication peripherals for a wide range of general purpose and low power applications. These 28/40/44-pin devices are equipped with a 10-bit ADC with Computation (ADC2) automating Capacitive Voltage Divider (CVD) techniques for advanced touch sensing, averaging, filtering, oversampling and performing automatic threshold comparisons. They also offer a set of core independent peripherals such as Complementary Waveform Generator (CWG), Windowed Watchdog timer (WWDT), Cyclic Redundancy Check (CRC)/Memory Scan, Zero-Cross Detect (ZCD), Configurable Logic Cell (CLC), and Peripheral Pin Select (PPS), providing increased design flexibility and lower system cost.
C Compiler optimized RISC architecture
64 MHz clock input over the full VDD range
62.5 ns minimum instruction cycle
Programmable 2-level interrupt priority
31-Level deep hardware stack
Three 8 bit Timers (TMR2/4/6) with hardware limit timer (HLT)
Four 16-Bit Timers (TMR0/1/3/5)
Low current power on reset (POR)
Power up timer (PWRT)
Brown out reset (BOR)
low power BOR (LPBOR) option
64 MHz clock input over the full VDD range
62.5 ns minimum instruction cycle
Programmable 2-level interrupt priority
31-Level deep hardware stack
Three 8 bit Timers (TMR2/4/6) with hardware limit timer (HLT)
Four 16-Bit Timers (TMR0/1/3/5)
Low current power on reset (POR)
Power up timer (PWRT)
Brown out reset (BOR)
low power BOR (LPBOR) option