Microchip, 8bit PIC, PIC Microcontroller, 128 kB Flash, 28-Pin SOIC
- RS Stock No.:
- 236-8931P
- Mfr. Part No.:
- PIC18F27K42-I/SO
- Brand:
- Microchip
Bulk discount available
Subtotal 10 units (supplied in a tube)*
£20.02
(exc. VAT)
£24.02
(inc. VAT)
FREE delivery for orders over £50.00
In Stock
- 175 unit(s) ready to ship
Need more? Click ‘Check delivery dates’ to find extra stock and lead times.
Units | Per unit |
---|---|
10 - 20 | £2.002 |
25 + | £1.96 |
*price indicative
- RS Stock No.:
- 236-8931P
- Mfr. Part No.:
- PIC18F27K42-I/SO
- Brand:
- Microchip
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
---|---|---|
Brand | Microchip | |
Family Name | PIC | |
Package Type | SOIC | |
Mounting Type | Surface Mount | |
Pin Count | 28 | |
Device Core | PIC | |
Data Bus Width | 8bit | |
Program Memory Size | 128 kB | |
Program Memory Type | Flash | |
Select all | ||
---|---|---|
Brand Microchip | ||
Family Name PIC | ||
Package Type SOIC | ||
Mounting Type Surface Mount | ||
Pin Count 28 | ||
Device Core PIC | ||
Data Bus Width 8bit | ||
Program Memory Size 128 kB | ||
Program Memory Type Flash | ||
The Microchip MCUs integrate a rich set of core independent peripherals, intelligent analog peripherals and large Flash/RAM/EEPROM memories. This devices also offer a host of low power features, performance improvements and design flexibility options that easily and rapidly enable the complex set of functions required by many of today's embedded control applications.
C Compiler optimized RISC architecture
Up to 64 MHz clock input
62.5 ns minimum instruction cycle
Two direct memory access (DMA) controllers
User-programmable source and destination sizes
Hardware and software-triggered data transfers
System bus arbiter with user-configurable
Priorities for scanner and DMA1/DMA2 with respect to the main line and interrupt execution
Vectored Interrupt capability
Selectable high/low priority
Fixed interrupt latency
Programmable vector table base address
31-Level deep hardware stack
Up to 64 MHz clock input
62.5 ns minimum instruction cycle
Two direct memory access (DMA) controllers
User-programmable source and destination sizes
Hardware and software-triggered data transfers
System bus arbiter with user-configurable
Priorities for scanner and DMA1/DMA2 with respect to the main line and interrupt execution
Vectored Interrupt capability
Selectable high/low priority
Fixed interrupt latency
Programmable vector table base address
31-Level deep hardware stack