STM8L050J3 features an enhanced STM8 CPU core providing increased processing power (up to 16 MIPS at 16 MHz) while maintaining the advantages of a CISC architecture with improved code density, a 24-bit linear addressing space and an optimized architecture for low-power operations. The STM8L050J3 MCU includes an integrated debug module with a hardware interface (SWIM) which allows non-intrusive In-Application debugging and ultra-fast Flash programming. It features an embedded data EEPROM and low-power, low-voltage, single-supply program Flash memory. The device incorporates an extensive range of enhanced I/Os and peripherals, a 12-bit ADC, two comparators, a real-time clock, two 16-bit timers, one 8-bit timer, as well as standard communication interfaces such as an SPI, an I2C interface, and one USART. The modular design of the peripheral set allows this device to have the same peripherals that can be found in different ST microcontroller families including 32-bit families.