Specifications

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Legislation and Compliance

Product Details

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Select all	Attribute	Value
	Brand	Cypress Semiconductor
	Family Name	CY8C4200
	Package Type	QFN
	Mounting Type	Surface Mount
	Pin Count	56
	Device Core	ARM Cortex M0
	Data Bus Width	32bit
	Program Memory Size	128 kB
	Maximum Frequency	48MHz
	RAM Size	16 kB
	Number of SPI Channels	2
	Number of UART Channels	2
	Typical Operating Supply Voltage	1.8 → 5.5 V
	Number of I2C Channels	2
	Maximum Operating Temperature	+85 °C
	Program Memory Type	Flash
	Length	7mm
	Number of ADC Units	1
	ADCs	1 x 12 bit
	Height	0.5mm
	Data Rate	1000kbit/s
	Width	7mm
	Dimensions	7 x 7 x 0.5mm
	Minimum Operating Temperature	-40 °C
	Instruction Set Architecture	Thumb-2

	Select all
	Brand Cypress Semiconductor
	Family Name CY8C4200
	Package Type QFN
	Mounting Type Surface Mount
	Pin Count 56
	Device Core ARM Cortex M0
	Data Bus Width 32bit
	Program Memory Size 128 kB
	Maximum Frequency 48MHz
	RAM Size 16 kB
	Number of SPI Channels 2
	Number of UART Channels 2
	Typical Operating Supply Voltage 1.8 → 5.5 V
	Number of I2C Channels 2
	Maximum Operating Temperature +85 °C
	Program Memory Type Flash
	Length 7mm
	Number of ADC Units 1
	ADCs 1 x 12 bit
	Height 0.5mm
	Data Rate 1000kbit/s
	Width 7mm
	Dimensions 7 x 7 x 0.5mm
	Minimum Operating Temperature -40 °C
	Instruction Set Architecture Thumb-2

Datasheet CY8C4247LQI-BL483

COO (Country of Origin):: PH

32-bit MCU Subsystem
48-MHz Arm Cortex-M0 CPU with single-cycle multiply and DMA
Up to 256 KB of flash with Read Accelerator
Up to 32 KB of SRAM
BLE Radio and Subsystem
BLE 4.2 support
2.4-GHz RF transceiver with 50-Ω antenna drive
Digital PHY
Link-Layer engine supporting master and slave modes
RF output power: –18 dBm to +3 dBm
RX sensitivity: –89 dBm
RX current: 18.7 mA
TX current: 15.6 mA at 0 dBm
RSSI: 1-dB resolution
Programmable Analogue
Four Op Amps with reconfigurable high-drive external and high-bandwidth internal drive, Comparator modes, and ADC input buffering capability. Can operate in Deep Sleep mode
12-bit, 1-Msps SAR ADC with differential and single-ended modes, Channel Sequencer with signal averaging
Two current DACs (IDACs) for general-purpose or capacitive sensing applications on any pin
Two low-power comparators that operate in Deep Sleep mode Programmable Digital
Four programmable logic blocks called universal digital blocks, (UDBs), each with eight Macro cells and data path
Cypress-provided peripheral component library, user-defined state machines, and Verilog input
Power Management
Active mode: 1.7 mA at 3-MHz flash program execution
Deep Sleep mode: 1.5 μA with watch crystal oscillator (WCO) on
Hibernate mode: 150 nA with RAM retention
Stop mode: 60 nA

Cypress Semiconductor, 32bit ARM Cortex M0, CY8C4200 Microcontroller, 48MHz, 128 kB Flash, 56-Pin QFN