Infineon, 32bit ARM Cortex M0, PSoC 4000 Microcontroller, 16MHz, 16 kB Flash, 16-Pin SOIC

Discontinued
RS Stock No.:
188-5367
Mfr. Part No.:
CY8C4014SXI-421
Brand:
Cypress Semiconductor
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Brand

Cypress Semiconductor

Family Name

PSoC 4000

Package Type

SOIC

Mounting Type

Surface Mount

Pin Count

16

Device Core

ARM Cortex M0

Data Bus Width

32bit

Program Memory Size

16 kB

Maximum Frequency

16MHz

RAM Size

2 kB

Number of I2C Channels

1

Typical Operating Supply Voltage

1.8 → 5.5 V

Width

3.98mm

Instruction Set Architecture

Thumb-2

Dimensions

9.98 x 3.98 x 1.47mm

Minimum Operating Temperature

-40 °C

Length

9.98mm

Height

1.47mm

Maximum Operating Temperature

+85 °C

Program Memory Type

Flash

PSoC 4 (ARM Cortex-M0 Core), Cypress


The Cypress Semiconductor PSoC 4 (Programmable Embedded System-on-Chip) family contain an ARM Cortex-M0 processor both product families 4100 and the 4200 platform architecture feature a combination of a microcontroller with op amps with Comparator mode, digital programmable logic, A/D converter as well as communication and timing devices. In the PSoC4 platform the controllers are compatible with each other for designing and new applications.

32-bit MCU Sub-system
24 MHz ARM Cortex-M0 CPU with single-cycle multiply (PSoC 4100 Family)
48 MHz ARM Cortex-M0 CPU with single cycle multiply (PSoC 4200 family)
Up to 32 kB of flash with Read Accelerator
Up to 4 kB of SRAM /SRAM+
Compatible with members of the PSoC 4 platform

32-bit MCU Subsystem
16-MHz ARM Cortex-M0 CPU
Up to 16 KB of flash with Read Accelerator
Up to 2 KB of SRAM
Programmable Analogue
Two current DACs (IDACs) for general-purpose or capacitive sensing applications
One low-power comparator with internal reference
Low Power 1.71-V to 5.5-V operation
Deep Sleep mode with wake-up on interrupt and I2C address detect
Capacitive Sensing
Cypress CapSense Sigma-Delta (CSD) provides best-in-class signal-to-noise ratio (SNR) and water tolerance
Cypress-supplied software component makes capacitive sensing design easy
Automatic hardware tuning (SmartSense™) over a sensor range of 5 pF to 45 pF
Serial Communication
Multi-master I2C block with the ability to do address matching during Deep Sleep and generate a wake-up on match
Timing and Pulse-Width Modulation
One 16-bit timer/counter/pulse-width modulator (TCPWM) block
Center-aligned, Edge, and Pseudo-Random modes
Comparator-based triggering of Kill signals for motor drive and other high-reliability digital logic applications
Up to 20 Programmable GPIO Pins
28-pin SSOP, 24-pin QFN, 16-pin SOIC, 16-pin QFN, 16 ball WLCSP, and 8-pin SOIC packages
GPIO pins on Ports 0, 1, and 2 can be CapSense or have other functions