Renesas Electronics, 32bit RXv2, RX651 Microcontroller, 120MHz, 1 MB Flash, 100-Pin TFLGA
- RS Stock No.:
- 168-1717
- Mfr. Part No.:
- R5F56519BDLJ#20
- Brand:
- Renesas Electronics
Unavailable
RS will no longer stock this product.
- RS Stock No.:
- 168-1717
- Mfr. Part No.:
- R5F56519BDLJ#20
- Brand:
- Renesas Electronics
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Renesas Electronics | |
| Family Name | RX651 | |
| Package Type | TFLGA | |
| Mounting Type | Surface Mount | |
| Pin Count | 100 | |
| Device Core | RXv2 | |
| Data Bus Width | 32bit | |
| Program Memory Size | 1 MB | |
| Maximum Frequency | 120MHz | |
| RAM Size | 256 kB | |
| USB Channels | 1 | |
| Number of PWM Units | 0 | |
| Number of SPI Channels | 3 | |
| Number of UART Channels | 0 | |
| Number of CAN Channels | 2 | |
| Number of I2C Channels | 3 | |
| Typical Operating Supply Voltage | 3.6 (Maximum) V | |
| Number of USART Channels | 0 | |
| Pulse Width Modulation | 0 | |
| Number of PCI Channels | 0 | |
| Number of Ethernet Channels | 0 | |
| Number of LIN Channels | 0 | |
| Height | 1.05mm | |
| Width | 7mm | |
| Dimensions | 7 x 7 x 1.05mm | |
| Number of ADC Units | 2 | |
| Maximum Operating Temperature | +85 °C | |
| ADCs | 29 x 12 bit | |
| Maximum Number of Ethernet Channels | 0 | |
| Instruction Set Architecture | CISC | |
| Minimum Operating Temperature | -40 °C | |
| Length | 7mm | |
| Program Memory Type | Flash | |
| Select all | ||
|---|---|---|
Brand Renesas Electronics | ||
Family Name RX651 | ||
Package Type TFLGA | ||
Mounting Type Surface Mount | ||
Pin Count 100 | ||
Device Core RXv2 | ||
Data Bus Width 32bit | ||
Program Memory Size 1 MB | ||
Maximum Frequency 120MHz | ||
RAM Size 256 kB | ||
USB Channels 1 | ||
Number of PWM Units 0 | ||
Number of SPI Channels 3 | ||
Number of UART Channels 0 | ||
Number of CAN Channels 2 | ||
Number of I2C Channels 3 | ||
Typical Operating Supply Voltage 3.6 (Maximum) V | ||
Number of USART Channels 0 | ||
Pulse Width Modulation 0 | ||
Number of PCI Channels 0 | ||
Number of Ethernet Channels 0 | ||
Number of LIN Channels 0 | ||
Height 1.05mm | ||
Width 7mm | ||
Dimensions 7 x 7 x 1.05mm | ||
Number of ADC Units 2 | ||
Maximum Operating Temperature +85 °C | ||
ADCs 29 x 12 bit | ||
Maximum Number of Ethernet Channels 0 | ||
Instruction Set Architecture CISC | ||
Minimum Operating Temperature -40 °C | ||
Length 7mm | ||
Program Memory Type Flash | ||
- COO (Country of Origin):
- JP
120-MHz 32-bit RX MCU, on-chip FPU, 240 DMIPS, up to 2-MB flash memory, 640-KB SRAM, various communications interfaces including Ethernet MAC, SD host interface, SD slave interface, quad SPI, and CAN, 12-bit A/D converter, RTC, Encryption functions, CMOS camera interface, Graphic-LCD controller, 2D drawing engine
32-bit RXv2 CPU core
Max. operating frequency 120MHz
Single precision 32-bit IEEE-754 floating point
Two types of multiply-and-accumulation unit
32-bit multiplier
Fast interrupt
CISC Harvard architecture, 5-stage pipeline
Variable-length instructions: Ultra-compact code
Low-power design
Operation from single 2.7- to 3.6-V supply
RTC capable of operation from dedicated power supply.
Supports versions up to 2Mbytes of ROM
Programming/erasing as background operations
Dual-bank structure allows exchanging start-up bank.
32Kbytes reprogrammable up to 100,000 times
Programming/erasing as background operations
Max. operating frequency 120MHz
Single precision 32-bit IEEE-754 floating point
Two types of multiply-and-accumulation unit
32-bit multiplier
Fast interrupt
CISC Harvard architecture, 5-stage pipeline
Variable-length instructions: Ultra-compact code
Low-power design
Operation from single 2.7- to 3.6-V supply
RTC capable of operation from dedicated power supply.
Supports versions up to 2Mbytes of ROM
Programming/erasing as background operations
Dual-bank structure allows exchanging start-up bank.
32Kbytes reprogrammable up to 100,000 times
Programming/erasing as background operations