Microchip, 8bit 8 bit MCU, PIC18F46Q84 Microcontroller, 64MHz, 64 kb Flash, 44-Pin TQFP
- RS Stock No.:
- 631-518
- Mfr. Part No.:
- PIC18F46Q84-E/PTVAO
- Brand:
- Microchip
Subtotal (1 box of 480 units)*
£754.56
(exc. VAT)
£905.28
(inc. VAT)
FREE delivery for orders over £50.00
Temporarily out of stock
- Shipping from 28 November 2025
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Units | Per unit | Per Box* |
---|---|---|
480 + | £1.572 | £754.56 |
*price indicative
- RS Stock No.:
- 631-518
- Mfr. Part No.:
- PIC18F46Q84-E/PTVAO
- Brand:
- Microchip
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
---|---|---|
Brand | Microchip | |
Family Name | PIC18F46Q84 | |
Package Type | TQFP | |
Mounting Type | Surface Mount | |
Pin Count | 44 | |
Device Core | 8 bit MCU | |
Data Bus Width | 8bit | |
Program Memory Size | 64 kb | |
Maximum Frequency | 64MHz | |
Program Memory Type | Flash | |
Select all | ||
---|---|---|
Brand Microchip | ||
Family Name PIC18F46Q84 | ||
Package Type TQFP | ||
Mounting Type Surface Mount | ||
Pin Count 44 | ||
Device Core 8 bit MCU | ||
Data Bus Width 8bit | ||
Program Memory Size 64 kb | ||
Maximum Frequency 64MHz | ||
Program Memory Type Flash | ||
- COO (Country of Origin):
- TH
The Microchip 8 bit MCUs expands by combining an extensive array of Core Independent Peripherals (CIPs) with Controller Area Network Flexible Data Rate (CAN FD). These cost optimized MCUs contain time-saving CIPs in up to 48-pins with up to 128 KB of flash memory. The family introduces new features and peripherals like the Universal Timer (UTMR) with customization capability
context switching added to the 12-bit ADC with Computation for automating analogue signal analysis for real-time system response.
Data transfers capabilities
User programmable source and destination sizes
Hardware and software triggered data transfers
Fixed interrupt latency of three instruction cycles
Programmable vector table base address
Backwards compatible with previous interrupt capabilities
User programmable source and destination sizes
Hardware and software triggered data transfers
Fixed interrupt latency of three instruction cycles
Programmable vector table base address
Backwards compatible with previous interrupt capabilities
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