Texas Instruments SN74LV21APWR, Dual 4-Input AND Logic Gate, 14-Pin TSSOP

Discontinued product

Technical Reference

Low-Voltage CMOS logic
Operating Voltage: 2 to 5.5
Compatibility: Input LVTTL/TTL, Output LVCMOS

74LV Family

Attribute	Value
Logic Function	AND
Mounting Type	Surface Mount
Number of Elements	2
Number of Inputs per Gate	4
Schmitt Trigger Input	No
Package Type	TSSOP
Pin Count	14
Logic Family	LV
Maximum Operating Supply Voltage	5.5 V
Maximum High Level Output Current	-12mA
Maximum Propagation Delay Time @ Maximum CL	10.5 ns @ 3.3 V, 15.7 ns @ 2.5 V, 7 ns @ 5 V
Minimum Operating Supply Voltage	2 V
Maximum Low Level Output Current	12mA
Length	5mm
Propagation Delay Test Condition	50pF
Height	1.15mm
Minimum Operating Temperature	-40 °C
Dimensions	5 x 4.4 x 1.15mm
Width	4.4mm
Maximum Operating Temperature	+85 °C