Toshiba 74HC02D, Quad 2-Input NOR Logic Gate, 14-Pin SOIC
- RS Stock No.:
- 171-3443
- Mfr. Part No.:
- 74HC02D
- Brand:
- Toshiba
Unavailable
RS will no longer stock this product.
- RS Stock No.:
- 171-3443
- Mfr. Part No.:
- 74HC02D
- Brand:
- Toshiba
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
---|---|---|
Brand | Toshiba | |
Logic Function | NOR | |
Mounting Type | Surface Mount | |
Number of Elements | 4 | |
Number of Inputs per Gate | 2 | |
Package Type | SOIC | |
Pin Count | 14 | |
Logic Family | 74HC | |
Maximum Operating Supply Voltage | 6 V | |
Maximum High Level Output Current | -5.2mA | |
Maximum Propagation Delay Time @ Maximum CL | 95 ns @ 50 pF | |
Minimum Operating Supply Voltage | 2 V | |
Maximum Low Level Output Current | 5.2mA | |
Width | 3.9mm | |
Height | 1.38mm | |
Length | 8.95mm | |
Propagation Delay Test Condition | 50pF | |
Output Type | Buffer, CMOS | |
Maximum Operating Temperature | +85 °C | |
Minimum Operating Temperature | -40 °C | |
Dimensions | 8.95 x 3.9 x 1.38mm | |
Select all | ||
---|---|---|
Brand Toshiba | ||
Logic Function NOR | ||
Mounting Type Surface Mount | ||
Number of Elements 4 | ||
Number of Inputs per Gate 2 | ||
Package Type SOIC | ||
Pin Count 14 | ||
Logic Family 74HC | ||
Maximum Operating Supply Voltage 6 V | ||
Maximum High Level Output Current -5.2mA | ||
Maximum Propagation Delay Time @ Maximum CL 95 ns @ 50 pF | ||
Minimum Operating Supply Voltage 2 V | ||
Maximum Low Level Output Current 5.2mA | ||
Width 3.9mm | ||
Height 1.38mm | ||
Length 8.95mm | ||
Propagation Delay Test Condition 50pF | ||
Output Type Buffer, CMOS | ||
Maximum Operating Temperature +85 °C | ||
Minimum Operating Temperature -40 °C | ||
Dimensions 8.95 x 3.9 x 1.38mm | ||
The 74HC02D is a high speed CMOS 2-INPUT NAND SCHMITT TRIGGER GATE fabricated with silicon gateC2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. Pin configuration and function are the same as the 74HC00D but the inputs have 25% VCC hysteresis and with its schmitt trigger inputs, the 74HC132D can be used as a line receiver for slow input signals. All inputs are equipped with protection circuits against static discharge or transient excess voltage.
High speed: tpd = 6 ns (typ.) at VCC = 5 V
Low power dissipation: ICC = 1.0 μA (max) Ta = 25
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V, Quad 2-Input NOR Gate
Low power dissipation: ICC = 1.0 μA (max) Ta = 25
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V, Quad 2-Input NOR Gate
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