Nexperia 74LVC1G11GW,125 3-Input AND Logic Gate, 6-Pin TSSOP
- RS Stock No.:
- 152-5541
- Mfr. Part No.:
- 74LVC1G11GW,125
- Brand:
- Nexperia
Stock information currently inaccessible
- RS Stock No.:
- 152-5541
- Mfr. Part No.:
- 74LVC1G11GW,125
- Brand:
- Nexperia
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Nexperia | |
| Logic Function | AND | |
| Mounting Type | Surface Mount | |
| Number of Elements | 1 | |
| Number of Inputs per Gate | 3 | |
| Package Type | TSSOP | |
| Pin Count | 6 | |
| Logic Family | 74LVC | |
| Input Type | CMOS | |
| Maximum Operating Supply Voltage | 5.5 V | |
| Maximum Propagation Delay Time @ Maximum CL | 21.5 ns @ 50 pF | |
| Minimum Operating Supply Voltage | 1.65 V | |
| Propagation Delay Test Condition | 50pF | |
| Maximum Operating Temperature | +125 °C | |
| Dimensions | 3.1 x 1.7 x 1mm | |
| Height | 1mm | |
| Length | 3.1mm | |
| Minimum Operating Temperature | -40 °C | |
| Width | 1.7mm | |
| Select all | ||
|---|---|---|
Brand Nexperia | ||
Logic Function AND | ||
Mounting Type Surface Mount | ||
Number of Elements 1 | ||
Number of Inputs per Gate 3 | ||
Package Type TSSOP | ||
Pin Count 6 | ||
Logic Family 74LVC | ||
Input Type CMOS | ||
Maximum Operating Supply Voltage 5.5 V | ||
Maximum Propagation Delay Time @ Maximum CL 21.5 ns @ 50 pF | ||
Minimum Operating Supply Voltage 1.65 V | ||
Propagation Delay Test Condition 50pF | ||
Maximum Operating Temperature +125 °C | ||
Dimensions 3.1 x 1.7 x 1mm | ||
Height 1mm | ||
Length 3.1mm | ||
Minimum Operating Temperature -40 °C | ||
Width 1.7mm | ||
Single 3-input AND gate, The 74LVC1G11 provides a single 3-input AND gate. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmitt-trigger action at all inputs makes the circuit highly tolerant to slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant inputs for interfacing with 5 V logic
High noise immunity
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Multiple package options
5 V tolerant inputs for interfacing with 5 V logic
High noise immunity
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Multiple package options