Nexperia 74LVC125APW,112 Buffer, Line Driver Logic Gate, 14-Pin TSSOP

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Subtotal (1 tube of 96 units)*

£7.296

(exc. VAT)

£8.736

(inc. VAT)

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  • 192 left, ready to ship
  • Final 8,256 unit(s) shipping from 28 October 2025
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96 +£0.076£7.30

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RS Stock No.:
124-2270
Mfr. Part No.:
74LVC125APW,112
Brand:
Nexperia
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Brand

Nexperia

Logic Function

Buffer, Line Driver

Mounting Type

Surface Mount

Schmitt Trigger Input

No

Package Type

TSSOP

Pin Count

14

Logic Family

LVC

Input Type

Single Ended

Maximum Operating Supply Voltage

3.6 V

Maximum High Level Output Current

-24mA

Maximum Propagation Delay Time @ Maximum CL

2.4 ns @ 3.3 V

Minimum Operating Supply Voltage

1.2 V

Maximum Low Level Output Current

24mA

Width

4.5mm

Height

0.95mm

Maximum Operating Temperature

+125 °C

Output Type

3 State

Dimensions

5.1 x 4.5 x 0.95mm

Minimum Operating Temperature

-40 °C

Propagation Delay Test Condition

50pF

Length

5.1mm

COO (Country of Origin):
TH

74LVC Family Inverters & Buffers


Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS

The 74LVC125A consists of four non-inverting buffers/line drivers with 3-state outputs (nY) that are controlled by the output enable input (nOE). A HIGH at nOE causes the outputs to assume a high-impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs.

Mixed 5 V and 3.3 V applications
Improved current drive and voltage level of signals
Improved signal integrity for complex layouts
Wide supply voltage range
Low propagation delay
TTL input options
3-state output options
Overvoltage tolerant options
Registered options
Key applications
LCD TV
Cell phones
Industrial monitoring
STB


74LVC Family

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