Maxim DS2482S-100+, I2C Translator, 8-Pin SOIC

Technical Reference
Legislation and Compliance
RoHS Certificate of Compliance
Product Details

I²C to 1-Wire Bridge

I²C Host Interface, Supports 100kHz and 400kHz I²C Communication Speeds
1-Wire Master I/O with Selectable Active or Passive 1-Wire Pullup
Provides Reset/Presence, 8-Bit, Single-Bit, and Three-Bit 1-Wire I/O Sequences
Eight Channels of Independently Operated 1-Wire I/O
Standard and Overdrive 1-Wire Communication Speeds
Slew Controlled 1-Wire Edges
Supports Low-Impedance 1-Wire Strong Pullup for EEPROMs, Temp Sensors, or Other 1-Wire Slaves That Have Momentary High Current Modes
A number of Address Inputs for I²C Address Assignment
Wide Operating Range: 2.9 to 5.5V, -40 to +85°C

Note

Please note that any defect or non – conformance of this product must be discovered and reported to RS within 20 days of purchase.

1-wire Serial Bus

Specifications
Attribute Value
Bus Compatibility I2C
Mounting Type Surface Mount
Package Type SOIC
Pin Count 8
Dimensions 5 x 4 x 1.5mm
Bi-Directional Yes
Length 5mm
Width 4mm
Height 1.5mm
Maximum Operating Supply Voltage 5.5 V
Maximum Operating Temperature +85 °C
Minimum Operating Supply Voltage 2.9 V
Minimum Operating Temperature -40 °C
10 In stock for FREE next working day delivery
Price Each (In a Pack of 5)
£ 1.248
(exc. VAT)
£ 1.498
(inc. VAT)
Units
Per unit
Per Pack*
5 - 5
£1.248
£6.24
10 - 20
£1.224
£6.12
25 - 45
£1.08
£5.40
50 - 70
£0.92
£4.60
75 +
£0.90
£4.50
*price indicative
Packaging Options:
Related Products
A range of Switch Debounce ICs that are ...
Description:
A range of Switch Debounce ICs that are intended to ensure a clean interface between electromechanical switches and subsequent digital circuitry. The debounce function is effective on both closing and opening switch operations, and no additional components are required. Inputs are ESD protected to ±15k VSingle supply operation: 2.7 to ...
The 74HC74 and 74HCT74 are dual positive edge ...
Description:
The 74HC74 and 74HCT74 are dual positive edge triggered D-type flip-flop. They have individual data (n D), clock (n CP), set (n SD) and reset (n RD) inputs, and complementary nQ and nQ outputs. Data at the nD-input, that meets the set-up and hold time requirements on the LOW-to-HIGH clock ...
Part of a comprehensive portfolio of logic families ...
Description:
Part of a comprehensive portfolio of logic families and functions, our OR gates are ideal for control / glue logic, PCB miniaturization and routing simplification. Mixed 5 V and 3.3 V applications Reduce time to market for complex designs Save board space Open-drain output options Improved signal integrity for complex ...
The SY10/100ELT22 are dual TTL-to-differential PECL translators. Because ...
Description:
The SY10/100ELT22 are dual TTL-to-differential PECL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and the low skew, dual gate design of the ELT22 makes it ideal for applications which require the tranlation of a clock and a ...