Lattice FPGA ICE40HX1K-VQ100, iCE40 HX 1280 Cells, 64kbit, 160 Blocks, 100-Pin VQFP
- RS Stock No.:
- 168-4220
- Mfr. Part No.:
- ICE40HX1K-VQ100
- Brand:
- Lattice Semiconductor
Subtotal (1 bag of 90 units)*
£440.73
(exc. VAT)
£528.84
(inc. VAT)
FREE delivery for orders over £50.00
In Stock
- 90 unit(s) ready to ship
Need more? Click ‘Check delivery dates’ to find extra stock and lead times.
Units | Per unit | Per Bag* |
|---|---|---|
| 90 + | £4.897 | £440.73 |
*price indicative
- RS Stock No.:
- 168-4220
- Mfr. Part No.:
- ICE40HX1K-VQ100
- Brand:
- Lattice Semiconductor
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Lattice Semiconductor | |
| Family Name | iCE40 HX | |
| Number of Logic Cells | 1280 | |
| Number of Logic Units | 160 | |
| Number of Registers | 1280 | |
| Mounting Type | Surface Mount | |
| Package Type | VQFP | |
| Pin Count | 100 | |
| Number of RAM Bits | 64kbit | |
| Dimensions | 14 x 14 x 1.05mm | |
| Height | 1.05mm | |
| Length | 14mm | |
| Minimum Operating Temperature | -40 °C | |
| Maximum Operating Supply Voltage | 1.26 V | |
| Maximum Operating Temperature | +85 °C | |
| Width | 14mm | |
| Minimum Operating Supply Voltage | 1.14 V | |
Select all | ||
|---|---|---|
Brand Lattice Semiconductor | ||
Family Name iCE40 HX | ||
Number of Logic Cells 1280 | ||
Number of Logic Units 160 | ||
Number of Registers 1280 | ||
Mounting Type Surface Mount | ||
Package Type VQFP | ||
Pin Count 100 | ||
Number of RAM Bits 64kbit | ||
Dimensions 14 x 14 x 1.05mm | ||
Height 1.05mm | ||
Length 14mm | ||
Minimum Operating Temperature -40 °C | ||
Maximum Operating Supply Voltage 1.26 V | ||
Maximum Operating Temperature +85 °C | ||
Width 14mm | ||
Minimum Operating Supply Voltage 1.14 V | ||
- COO (Country of Origin):
- KR
Field Programmable Gate Arrays, Lattice Semiconductor
An FPGA is a semiconductor device consisting of a matrix of Configurable Logic Blocks (CLBs) connected through programmable interconnects. The user determines these interconnections by programming SRAM. A CLB can be simple (AND, OR gates, etc) or complex (a block of RAM). The FPGA allows changes to be made to a design even after the device is soldered into a PCB.