Nexperia 74HCT574PW,118 Octal D Type Flip Flop IC, 3-State, 20-Pin TSSOP
- RS Stock No.:
- 181-7374
- Mfr. Part No.:
- 74HCT574PW,118
- Brand:
- Nexperia
Stock information currently inaccessible
- RS Stock No.:
- 181-7374
- Mfr. Part No.:
- 74HCT574PW,118
- Brand:
- Nexperia
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Nexperia | |
| Logic Family | 74HCT | |
| Logic Function | D Type | |
| Input Type | TTL | |
| Output Type | 3 State | |
| Output Signal Type | Single Ended | |
| Triggering Type | Positive Edge | |
| Polarity | Non-Inverting | |
| Mounting Type | Surface Mount | |
| Package Type | TSSOP | |
| Pin Count | 20 | |
| Number of Elements per Chip | 8 | |
| Maximum Propagation Delay Time @ Maximum CL | 225 ns @ 50 pF | |
| Dimensions | 6.6 x 4.5 x 0.95mm | |
| Maximum Operating Supply Voltage | 5.5 V | |
| Maximum Operating Temperature | +125 °C | |
| Width | 4.5mm | |
| Minimum Operating Temperature | -40 °C | |
| Minimum Operating Supply Voltage | 4.5 V | |
| Length | 6.6mm | |
| Propagation Delay Test Condition | 50pF | |
| Height | 0.95mm | |
| Select all | ||
|---|---|---|
Brand Nexperia | ||
Logic Family 74HCT | ||
Logic Function D Type | ||
Input Type TTL | ||
Output Type 3 State | ||
Output Signal Type Single Ended | ||
Triggering Type Positive Edge | ||
Polarity Non-Inverting | ||
Mounting Type Surface Mount | ||
Package Type TSSOP | ||
Pin Count 20 | ||
Number of Elements per Chip 8 | ||
Maximum Propagation Delay Time @ Maximum CL 225 ns @ 50 pF | ||
Dimensions 6.6 x 4.5 x 0.95mm | ||
Maximum Operating Supply Voltage 5.5 V | ||
Maximum Operating Temperature +125 °C | ||
Width 4.5mm | ||
Minimum Operating Temperature -40 °C | ||
Minimum Operating Supply Voltage 4.5 V | ||
Length 6.6mm | ||
Propagation Delay Test Condition 50pF | ||
Height 0.95mm | ||
- COO (Country of Origin):
- CN
The 74HC574, 74HCT574 is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Input levels:
For 74HC574: CMOS level
For 74HCT574: TTL level
3-state non-inverting outputs for bus oriented applications
8-bit positive, edge-triggered register
Common 3-state output enable input
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
For 74HC574: CMOS level
For 74HCT574: TTL level
3-state non-inverting outputs for bus oriented applications
8-bit positive, edge-triggered register
Common 3-state output enable input
Specified from -40 °C to +85 °C and from -40 °C to +125 °C