Toshiba 74VHC174FT Hex D Type Flip Flop IC, CMOS, 16-Pin TSSOP
- RS Stock No.:
- 171-3402
- Mfr. Part No.:
- 74VHC174FT
- Brand:
- Toshiba
Unavailable
RS will no longer stock this product.
- RS Stock No.:
- 171-3402
- Mfr. Part No.:
- 74VHC174FT
- Brand:
- Toshiba
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Toshiba | |
| Logic Family | 74VHC | |
| Logic Function | D Type | |
| Input Type | CMOS | |
| Output Type | CMOS | |
| Output Signal Type | Single Ended | |
| Triggering Type | Positive Edge | |
| Polarity | Non-Inverting | |
| Mounting Type | Surface Mount | |
| Package Type | TSSOP | |
| Pin Count | 16 | |
| Number of Elements per Chip | 6 | |
| Maximum Propagation Delay Time @ Maximum CL | 19 ns @ 50 pF | |
| Maximum Operating Supply Voltage | 5.5 V | |
| Dimensions | 5 x 4.4 x 1mm | |
| Minimum Operating Supply Voltage | 2 V | |
| Minimum Operating Temperature | -40 °C | |
| Width | 4.4mm | |
| Height | 1mm | |
| Maximum Operating Temperature | +125 °C | |
| Propagation Delay Test Condition | 50pF | |
| Length | 5mm | |
| Automotive Standard | AEC-Q100 | |
| Select all | ||
|---|---|---|
Brand Toshiba | ||
Logic Family 74VHC | ||
Logic Function D Type | ||
Input Type CMOS | ||
Output Type CMOS | ||
Output Signal Type Single Ended | ||
Triggering Type Positive Edge | ||
Polarity Non-Inverting | ||
Mounting Type Surface Mount | ||
Package Type TSSOP | ||
Pin Count 16 | ||
Number of Elements per Chip 6 | ||
Maximum Propagation Delay Time @ Maximum CL 19 ns @ 50 pF | ||
Maximum Operating Supply Voltage 5.5 V | ||
Dimensions 5 x 4.4 x 1mm | ||
Minimum Operating Supply Voltage 2 V | ||
Minimum Operating Temperature -40 °C | ||
Width 4.4mm | ||
Height 1mm | ||
Maximum Operating Temperature +125 °C | ||
Propagation Delay Test Condition 50pF | ||
Length 5mm | ||
Automotive Standard AEC-Q100 | ||
The 74VHC174FT is an advanced high speed CMOS HEX D-TYPE FLIP FLOP fabricated with silicon gateC2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. Information signals applied to D inputs are transferred to the Q output on the positive going edge of the clock pulse. When the CLR input is held low, the Q output are in the low logic level independent of the other inputs. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages.
Wide operating temperature: Topr = -40 to 125
High speed: Propagation delay time = 3.8 ns (typ.) at VCC = 5.0 V
Low power dissipation: ICC = 2.0 μA (max) at Ta = 25
High noise immunity: VNIH = VNIL = 28 % VCC (min)
Power-down protection is provided on all inputs.
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 to 5.5 V
Low noise: V = 0.8 V (max) Pin and function compatible with 74ALS174.
High speed: Propagation delay time = 3.8 ns (typ.) at VCC = 5.0 V
Low power dissipation: ICC = 2.0 μA (max) at Ta = 25
High noise immunity: VNIH = VNIL = 28 % VCC (min)
Power-down protection is provided on all inputs.
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 to 5.5 V
Low noise: V = 0.8 V (max) Pin and function compatible with 74ALS174.
