Cypress Semiconductor NOR 256Mbit CFI Flash Memory 84-Pin FBGA, S29WS256P0PBFW000
- RS Stock No.:
- 193-8931
- Mfr. Part No.:
- S29WS256P0PBFW000
- Brand:
- Cypress Semiconductor
Discontinued
- RS Stock No.:
- 193-8931
- Mfr. Part No.:
- S29WS256P0PBFW000
- Brand:
- Cypress Semiconductor
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Cypress Semiconductor | |
| Memory Size | 256Mbit | |
| Interface Type | CFI | |
| Package Type | FBGA | |
| Pin Count | 84 | |
| Organisation | 16M x 16 | |
| Mounting Type | Surface Mount | |
| Cell Type | NOR | |
| Minimum Operating Supply Voltage | 1.7 V | |
| Maximum Operating Supply Voltage | 1.95 V | |
| Dimensions | 11.6 x 8 x 0.76mm | |
| Maximum Random Access Time | 80ns | |
| Number of Bits per Word | 8bit | |
| Number of Banks | 16 | |
| Minimum Operating Temperature | -25 °C | |
| Number of Words | 32M | |
| Maximum Operating Temperature | +85 °C | |
| Select all | ||
|---|---|---|
Brand Cypress Semiconductor | ||
Memory Size 256Mbit | ||
Interface Type CFI | ||
Package Type FBGA | ||
Pin Count 84 | ||
Organisation 16M x 16 | ||
Mounting Type Surface Mount | ||
Cell Type NOR | ||
Minimum Operating Supply Voltage 1.7 V | ||
Maximum Operating Supply Voltage 1.95 V | ||
Dimensions 11.6 x 8 x 0.76mm | ||
Maximum Random Access Time 80ns | ||
Number of Bits per Word 8bit | ||
Number of Banks 16 | ||
Minimum Operating Temperature -25 °C | ||
Number of Words 32M | ||
Maximum Operating Temperature +85 °C | ||
- COO (Country of Origin):
- TH
The Cypress Semiconductor 256Mb mirror bit flash product fabricated on 90 nm process technology. These burst mode Flash device are capable of performing simultaneous read and write operation with zero latency on two separate bank using separate data and address pins. It has synchronous or asynchronous program operation which is independent of burst control register setting.
Four 16k word sector at both top and bottom of memory array
Dual boot sector configuration (top and bottom)
Handshaking by monitoring RDY
Dual boot sector configuration (top and bottom)
Handshaking by monitoring RDY